[Paper Review] 3D Simulation of Nanowire FETs using Quantum Models

Vijay Sai Patnaik, Ankit Gheedia+1 more|arXiv (Cornell University)|Aug 18, 2010

Advancements in Semiconductor Devices and Circuit Design8 references16 citations

TL;DR

This paper presents a 3D simulation of nanowire FETs using the Bohm Quantum Potential (BQP) model within the ATLAS device simulator to accurately capture quantum effects in sub-100nm devices. The study demonstrates that the BQP model effectively models short-channel behavior in multigate nanowire FETs, enabling reliable prediction of performance limits in ultra-scaled CMOS technologies.

ABSTRACT

After more than 30 years of validation of Moore's law, the CMOS technology has already entered the nanoscale (sub-100nm) regime and faces strong limitations. The nanowire transistor is one candidate which has the potential to overcome the problems caused by short channel effects in SOI MOSFETs and has gained signifi - cant attention from both device and circuit developers. In addition to the effective suppression of short channel effects due to the improved gate strength, the multi-gate NWFETs show excellent current drive and have the merit that they are compatible with conventional CMOS processes. To simulate these devices, accurate modeling and calculations based on quantum mechanics are necessary to assess their performance limits, since cross-sections of the multigate NWFETs are expected to be a few nanometers wide in their ultimate scaling. In this paper we have explored the use of ATLAS including the Bohm Quantum Potential (BQP) for simulating and studying the shortchannel behaviour of nanowire FETs.

Motivation & Objective

• To address the limitations of conventional CMOS scaling below 100nm, particularly short-channel effects in SOI MOSFETs.
• To evaluate the potential of nanowire FETs as a scalable alternative due to enhanced gate control and reduced leakage.
• To investigate the applicability of quantum mechanical models in accurately simulating nanowire FET behavior at the nanoscale.
• To validate the use of the Bohm Quantum Potential (BQP) model in 3D device simulation for predicting device performance limits.
• To provide a foundation for future design and optimization of multi-gate nanowire FETs compatible with existing CMOS processes.

Proposed method

• Employed the ATLAS device simulator with the inclusion of the Bohm Quantum Potential (BQP) model to account for quantum confinement effects.
• Conducted 3D simulations of multigate nanowire FETs with cross-sectional dimensions in the few-nanometer range.
• Applied the BQP model to capture non-classical quantum effects such as electron wavefunction quantization and tunneling.
• Simulated device behavior under varying gate lengths, doping profiles, and gate voltages to analyze short-channel effects.
• Used the BQP model as a semi-classical approximation to the full Schrödinger-Poisson system, enabling efficient 3D simulation.
• Validated results against expected physical trends in current drive and threshold voltage roll-off.

Experimental results

Research questions

• RQ1 How accurately can the Bohm Quantum Potential model predict short-channel effects in 3D nanowire FETs?
• RQ2 To what extent does the BQP model capture quantum confinement in sub-100nm nanowire cross-sections?
• RQ3 Can the BQP-based simulation reproduce key device characteristics such as current drive and threshold voltage stability?
• RQ4 How does the inclusion of quantum effects influence the scaling limits of multigate nanowire FETs?
• RQ5 What is the performance trade-off between gate control and quantum effects in ultra-scaled nanowire FETs?

Key findings

• The Bohm Quantum Potential model successfully captures quantum confinement effects in nanowire FETs with sub-100nm cross-sections.
• The BQP model enables accurate simulation of short-channel behavior, including threshold voltage roll-off and drain-induced barrier lowering.
• Simulations show improved gate control and reduced leakage current in nanowire FETs compared to planar SOI MOSFETs.
• The 3D BQP-based simulation predicts stable current drive characteristics even at gate lengths below 50 nm.
• The model provides a computationally efficient alternative to full quantum mechanical simulations while maintaining physical accuracy.
• The results confirm the feasibility of nanowire FETs as a viable path for continued CMOS scaling beyond the 100nm node.