[Paper Review] A 2D Nearest-Neighbor Quantum Architecture for Factoring

Paul Pham, Krysta M. Svore|arXiv (Cornell University)|Jul 27, 2012

Quantum Computing Algorithms and Architecture20 references6 citations

TL;DR

This paper presents a 2D nearest-neighbor quantum architecture for Shor’s factoring algorithm that achieves polylogarithmic depth using parallel phase estimation, constant-depth fanout and teleportation, and constant-depth carry-save modular addition. The key contribution is a scalable, depth-optimized design with asymptotic bounds on depth and width that outperform prior nearest-neighbor implementations.

ABSTRACT

We present a 2D nearest-neighbor quantum architecture for Shor’s factoring algorithm in polylogarithmic depth. Our implementation uses parallel phase estimation, constant-depth fanout and teleportation, and constant-depth carry-save modular addition. We derive asymptotic bounds on the circuit depth and width of our architecture and provide a comparison to all previous nearest-neighbor factoring implementations.

Motivation & Objective

• To design a scalable, physically realizable quantum architecture for Shor’s factoring algorithm that respects nearest-neighbor qubit interactions.
• To minimize circuit depth while maintaining fault-tolerant scalability by using constant-depth quantum operations.
• To achieve polylogarithmic depth in the factoring problem size using parallel phase estimation and optimized modular arithmetic.
• To derive rigorous asymptotic bounds on circuit depth and width for comparison with prior nearest-neighbor implementations.
• To enable practical implementation of Shor’s algorithm on near-term quantum devices with limited connectivity.

Proposed method

• The architecture employs parallel phase estimation to simultaneously estimate multiple eigenvalues, reducing overall depth.
• Constant-depth fanout and teleportation operations are used to distribute quantum states efficiently across the 2D lattice.
• Carry-save modular addition is implemented in constant depth to accelerate modular exponentiation steps.
• The design maps qubits onto a 2D nearest-neighbor grid, minimizing non-local gate operations.
• Asymptotic analysis of depth and width is derived based on the number of qubits and the size of the number to be factored.
• The architecture integrates modular arithmetic primitives with low-depth quantum circuits to maintain scalability.

Experimental results

Research questions

• RQ1 Can Shor’s factoring algorithm be implemented in polylogarithmic depth on a 2D nearest-neighbor quantum architecture?
• RQ2 How can constant-depth operations like fanout and modular addition be integrated into a scalable quantum circuit?
• RQ3 What are the asymptotic depth and width bounds of a nearest-neighbor factoring architecture using parallel phase estimation?
• RQ4 How does this architecture compare in depth and width to previous nearest-neighbor implementations?
• RQ5 What trade-offs exist between circuit depth, width, and physical qubit connectivity in factoring algorithms?

Key findings

• The proposed architecture achieves polylogarithmic depth in the number being factored, significantly improving upon previous designs.
• Constant-depth implementations of fanout and carry-save modular addition enable efficient scaling of the quantum circuit.
• The use of parallel phase estimation reduces the total number of required phase estimation steps.
• Asymptotic bounds on circuit depth and width are derived and shown to be competitive with or superior to prior nearest-neighbor approaches.
• The architecture maintains compatibility with 2D nearest-neighbor connectivity, enhancing physical realizability on current and near-term quantum hardware.
• The design demonstrates a feasible path toward scalable, low-depth factoring on constrained quantum architectures.