[Paper Review] An Investigation into the $HfO_2/Si$ Interface: Materials Science Challenges and their Effects on MOSFET Device Performance

Aditya Muralidharan|arXiv (Cornell University)|Jun 20, 2022

Semiconductor materials and devices4 citations

TL;DR

This paper investigates the thermodynamic and kinetic mechanisms behind interfacial SiO₂ layer formation at HfO₂/Si interfaces in MOSFETs, identifying oxygen diffusion along grain boundaries and SiO species as primary causes. It demonstrates that controlled nitrogen annealing and optimized ALD processes can suppress interlayer growth, reducing EOT and leakage current while maintaining high mobility and threshold voltage stability.

ABSTRACT

Since the 1960's when Gordon Moore proposed that the transistor density in our electronic devices should double every two years while the cost is halved, the semiconductor industry has taken this statement to heart. Over the last few decades, no other industry has seen growth even comparably close to that experienced by the semiconductors industry. This has all been made possible by the unbroken string of ingenious breakthroughs by brilliant minds that have been working tirelessly to shrink down transistors. The latest of which is the use of high-k dielectrics and a return to metal gates combined with 3D-transistor architectures. This has been the enabling technology for the transition from the 90 nm node to the 45 nm node, allowing us to shrink our transistors further without losing additional gate control. The fundamental reason for using a high-k gate dielectric compared to SiO2 is that shrinking our gate oxide further, which is already at a few angstroms, is no longer a feasible option to gain additional gate control. High-k dielectric overcome this by exploiting the fundamental physics of capacitors and the materials science of dielectrics to provide a viable option to increase gate control without the need for successively thinner gate oxides. Hafnium Oxide is the most studied and popular of such materials. Its high dielectric constant ~16-25 and interface stability with silicon at operating temperatures make it an ideal candidate for use in current CMOS technology. Despite its deceivingly simple appearance, the processes involved in the fabrication of such high-k HfO2/Si interfaces are full of process subtleties and nuances. In this term paper we hope to explore the physics and materials science of these high-k HfO2/Si interfaces, discussing the challenges and ways to overcome them when it comes to its actual fabrication, and how this ultimately affects our device performance.

Motivation & Objective

• To understand the thermodynamic and kinetic drivers behind SiO₂ interlayer formation at HfO₂/Si interfaces during high-temperature processing.
• To identify the root causes of interfacial layer growth that degrade EOT and device performance in high-k MOSFETs.
• To evaluate process parameters such as annealing ambient, oxygen flow, and deposition method (PEALD vs. thermal ALD) for mitigating interlayer formation.
• To correlate interlayer thickness and defect density with gate leakage current and threshold voltage shifts in HfO₂-based MOSFETs.
• To provide a materials science framework for optimizing HfO₂/Si interfaces to sustain CMOS scaling beyond the 45nm node.

Proposed method

• Conducted thermodynamic analysis using Gibbs free energy (ΔG₀ = 227.9 kJ/mol) to assess the stability of HfO₂/Si systems and rule out thermodynamic driving force as the primary cause of interlayer formation.
• Analyzed phase diagrams to evaluate interface stability up to ~1700 K, indicating that stability alone cannot explain interlayer growth.
• Investigated oxygen diffusion pathways, particularly along grain boundaries in polycrystalline HfO₂, due to positive oxygen vacancies facilitating ion transport.
• Evaluated the role of SiO species diffusion at the interface as a contributing factor to interlayer formation under oxidizing conditions.
• Compared leakage current and switching characteristics of HfO₂ films deposited via plasma-enhanced ALD (PEALD) and thermal ALD, linking amorphous structure to lower leakage.
• Assessed the impact of nitrogen ambient annealing and oxygen flow duration during deposition on interlayer thickness and defect passivation.

Experimental results

Research questions

• RQ1 What are the primary thermodynamic and kinetic drivers behind SiO₂ interlayer formation at HfO₂/Si interfaces during high-temperature processing?
• RQ2 How do oxygen diffusion along grain boundaries and SiO species mobility contribute to interlayer growth in polycrystalline HfO₂?
• RQ3 To what extent can nitrogen ambient annealing or controlled oxygen flow during deposition reduce interlayer thickness and leakage current?
• RQ4 How does the crystalline structure of HfO₂ (amorphous vs. polycrystalline) influence gate leakage and defect density?
• RQ5 What is the trade-off between interlayer formation (increasing EOT) and its beneficial effect on carrier mobility and threshold voltage stability?

Key findings

• Oxygen diffusion along grain boundaries in polycrystalline HfO₂, facilitated by positive oxygen vacancies, is the dominant mechanism for interlayer formation, not thermodynamic instability.
• Interlayer thickness increases under oxidizing annealing conditions due to enhanced oxygen diffusion, directly correlating with higher EOT and increased gate leakage.
• Nitrogen ambient annealing significantly reduces interlayer formation and leakage current, likely due to partial nitridation of HfO₂ and the interlayer, suppressing oxygen mobility.
• PEALD-deposited HfO₂ films exhibit superior leakage characteristics compared to thermal ALD films, attributed to their amorphous structure minimizing defect pathways.
• Controlled oxygen flow during deposition reduces leakage by annihilating oxygen vacancies at grain boundaries, which otherwise act as electron conduction pathways.
• Annealing cycles can reduce gate leakage by orders of magnitude, primarily through defect annihilation and trap passivation, with nitrogen ambient showing particular promise.