[Paper Review] ARMageddon: Last-Level Cache Attacks on Mobile Devices

Moritz Lipp, Daniel Gruss+2 more|arXiv (Cornell University)|Nov 16, 2015

Security and Verification in Computing47 references18 citations

TL;DR

This paper introduces Evict+Reload, the first access-based cross-core cache attack on ARM Cortex-A mobile processors, enabling generic side-channel attacks on non-rooted devices. It demonstrates that cache-based side-channel leaks—such as touchscreen input patterns and cryptographic timing—can be exploited on millions of off-the-shelf smartphones.

ABSTRACT

In the last 10 years cache attacks on Intel CPUs have gained increasing attention among the scientific community. More specifically, powerful techniques to exploit the cache side channel have been developed. However, so far only a few investigations have been performed on modern smartphones and mobile devices in general. In this work, we describe Evict+Reload, the first access-based cross-core cache attack on modern ARM Cortex-A architectures as used in most of today’s mobile devices. Our attack approach overcomes several limitations of existing cache attacks on ARM-based devices, for instance, the requirement of a rooted device or specific permissions. Thereby, we broaden the scope of cache attacks in two dimensions. First, we show that all existing attacks on the x86 architecture can also be applied to mobile devices. Second, despite the general belief these attacks can also be launched on non-rooted devices and, thus, on millions of off-the-shelf devices. Similarly to the well-known Flush+Reload attack for the x86 architecture, Evict+Reload allows to launch generic cache attacks on mobile devices. Based on cache template attacks we identify information leaking through the last-level cache that can be exploited, for instance, to infer tap and swipe events, inter-keystroke timings as well as the length of words entered on the touchscreen, and even cryptographic primitives implemented in Java. Furthermore, we demonstrate the applicability of Prime+Probe attacks on ARM Cortex-A CPUs. The performed example attacks demonstrate the immense potential of our proposed attack techniques.

Motivation & Objective

• To bridge the gap in cache side-channel attacks between x86 and ARM mobile architectures.
• To demonstrate that cache attacks previously limited to x86 systems can be adapted to modern ARM-based smartphones.
• To overcome prior limitations such as requiring rooted access or special permissions on mobile devices.
• To show that last-level cache side-channel attacks are feasible on non-rooted, off-the-shelf mobile devices.
• To validate the practicality of cache-based side-channel attacks on real-world mobile workloads, including user input and cryptographic operations.

Proposed method

• Adapting the Evict+Reload technique from x86 to ARM Cortex-A architectures for cross-core cache side-channel attacks.
• Using cache template attacks to identify and exploit information leakage through the last-level cache (LLC).
• Performing cache access monitoring via precise timing measurements to infer sensitive operations.
• Demonstrating the feasibility of Prime+Probe attacks on ARM Cortex-A CPUs for cache-based side-channel analysis.
• Leveraging the shared last-level cache across CPU cores to monitor access patterns of co-located processes.
• Applying the attack to real-world scenarios such as detecting touchscreen input timing and cryptographic primitive execution.

Experimental results

Research questions

• RQ1 Can access-based cache side-channel attacks like Evict+Reload be successfully ported from x86 to ARM Cortex-A mobile processors?
• RQ2 To what extent can cache side-channel attacks be launched on non-rooted mobile devices without special permissions?
• RQ3 What types of sensitive information can be inferred through last-level cache access patterns on mobile devices?
• RQ4 How effective are Prime+Probe and Evict+Reload techniques in the context of ARM-based mobile systems?
• RQ5 Can real-world user interactions such as typing and swiping be reverse-engineered from last-level cache side-channel leaks?

Key findings

• Evict+Reload is successfully implemented and demonstrated on modern ARM Cortex-A mobile processors, enabling cross-core cache side-channel attacks.
• The attack works on non-rooted devices, making it applicable to millions of off-the-shelf smartphones.
• Sensitive information such as inter-keystroke timings, word length, and swipe/tap events can be inferred from last-level cache access patterns.
• Cryptographic primitives implemented in Java are vulnerable to cache side-channel analysis via the proposed technique.
• Prime+Probe attacks are also applicable on ARM Cortex-A CPUs, expanding the range of feasible cache-based side-channel attacks.
• The study confirms that last-level cache side-channel attacks are not limited to x86 systems and represent a real threat to mobile platforms.