[Paper Review] Benchmarking variational quantum eigensolvers for the square-octagon-lattice Kitaev model
This paper benchmarks variational quantum eigensolvers (VQE) for the square-octagon-lattice Kitaev model on near-term quantum hardware, demonstrating that the Hamiltonian variational ansatz (HVA) outperforms hardware-efficient ansatzes (HEA) in optimization and fidelity. Using Rigetti's Aspen-9 processor with error mitigation, HVA achieves ground-state energy estimates within one standard deviation of the true value for four-qubit systems, though deeper circuits show significant infidelity, highlighting the need for improved error mitigation and direct QPU optimization.
Quantum spin systems may offer the first opportunities for beyond-classical quantum computations of scientific interest. While general quantum simulation algorithms likely require error-corrected qubits, there may be applications of scientific interest prior to the practical implementation of quantum error correction. The variational quantum eigensolver (VQE) is a promising approach to finding energy eigenvalues on noisy quantum computers. Lattice models are of broad interest for use on near-term quantum hardware due to the sparsity of the number of Hamiltonian terms and the possibility of matching the lattice geometry to the hardware geometry. Here, we consider the Kitaev spin model on a hardware-native square-octagon qubit connectivity map, and examine the possibility of efficiently probing its rich phase diagram with VQE approaches. By benchmarking different choices of variational Ansatz states and classical optimizers, we illustrate the advantage of a mixed optimization approach using the Hamiltonian variational Ansatz (HVA) and the potential of probing the system's phase diagram using VQE. We further demonstrate the implementation of HVA circuits on Rigetti's Aspen-9 chip with error mitigation.
Motivation & Objective
- To evaluate and compare variational quantum eigensolver (VQE) approaches for simulating the square-octagon-lattice Kitaev model on near-term quantum hardware.
- To identify the most effective ansatz and optimization strategy for probing the model’s rich phase diagram using noisy intermediate-scale quantum (NISQ) devices.
- To assess the feasibility of implementing VQE with error mitigation on real quantum processors, specifically Rigetti’s Aspen-9, for a strongly correlated spin system.
- To determine whether VQE can reliably estimate ground-state energy and energy gaps across different Hamiltonian parameter regimes.
Proposed method
- The study employs the Hamiltonian variational ansatz (HVA), inspired by adiabatic quantum computation and quantum approximate optimization, to construct low-depth parameterized quantum circuits tailored to the Kitaev model’s bond-dependent interactions.
- Different ansatzes—HVA and two hardware-efficient ansatzes (HEA) using CZ and XY entangling gates—are benchmarked for circuit depth, parameter count, and optimization performance.
- A mixed optimization strategy combining non-local (CMA-ES) and local (BOBYQA) optimizers with multiple initial values is used to avoid barren plateaus and improve convergence.
- Error mitigation techniques, including readout error mitigation and zero-noise extrapolation (ZNE) with randomized compilation, are applied to reduce infidelity in quantum circuit execution on the Aspen-9 processor.
- Theoretical ground-state energies and energy gaps are computed classically using exact diagonalization and compared to VQE results from both noiseless simulations and noisy quantum hardware runs.
- The square-octagon lattice geometry is matched to the native qubit connectivity of the Aspen-9 chip, enabling direct hardware mapping with open and periodic boundary conditions.
Experimental results
Research questions
- RQ1Can the Hamiltonian variational ansatz (HVA) achieve better optimization performance and lower circuit depth than hardware-efficient ansatzes (HEA) for the Kitaev model on near-term quantum hardware?
- RQ2How effective is a mixed optimization strategy combining CMA-ES and BOBYQA in avoiding barren plateaus and improving convergence for VQE in frustrated spin systems?
- RQ3To what extent can error mitigation techniques—particularly ZNE with randomized compilation—improve the fidelity of VQE results on noisy quantum processors like Rigetti’s Aspen-9?
- RQ4Can VQE with HVA reliably probe the phase diagram of the Kitaev model by estimating ground-state energy and energy gaps across different coupling parameters?
- RQ5What are the limitations of current NISQ devices in simulating deeper and wider circuits, as demonstrated by the eight-qubit HVA implementation?
Key findings
- The HVA outperforms both HEA variants in optimization efficiency and fidelity, with significantly reduced susceptibility to barren plateaus due to its structured parameterization.
- For the four-qubit system, the HVA on the Aspen-9 processor achieved an energy expectation value of −1.5217, within one standard deviation of the true ground-state energy (−1.5831), demonstrating feasibility with error mitigation.
- The eight-qubit HVA circuit, with 16 CZ gates and higher depth, yielded an extrapolated energy of −1.36 ± 0.054 using ZNE and randomized compilation, far from the ideal value of −4.23, indicating substantial decoherence and gate infidelity.
- The performance gap between noiseless simulation and hardware execution suggests systematic gate parameter shifts, underscoring the need for direct QPU-based optimization to mitigate calibration errors.
- The mixed optimizer strategy (CMA-ES + BOBYQA) with multiple initial values significantly improved convergence and consistency compared to single-optimizer approaches, especially in high-dimensional parameter spaces.
- The study confirms that deeper circuits approach the coherence time limit of the hardware, and parallel gate execution could improve results, highlighting a key bottleneck for future NISQ applications.
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This review was created by AI and reviewed by human editors.