[Paper Review] Demonstrating a long-coherence dual-rail erasure qubit using tunable transmons

Harry Levine, Arbel Haim+111 more|arXiv (Cornell University)|Jul 17, 2023

Quantum Information and Cryptography56 references8 citations

TL;DR

The paper demonstrates a superconducting dual-rail qubit formed from two resonantly-coupled transmons that converts T1 errors into detectable erasures, achieving millisecond-scale coherence within the dual-rail subspace and high erasure-detection fidelity.

ABSTRACT

Quantum error correction with erasure qubits promises significant advantages over standard error correction due to favorable thresholds for erasure errors. To realize this advantage in practice requires a qubit for which nearly all errors are such erasure errors, and the ability to check for erasure errors without dephasing the qubit. We demonstrate that a "dual-rail qubit" consisting of a pair of resonantly coupled transmons can form a highly coherent erasure qubit, where transmon $T_1$ errors are converted into erasure errors and residual dephasing is strongly suppressed, leading to millisecond-scale coherence within the qubit subspace. We show that single-qubit gates are limited primarily by erasure errors, with erasure probability $p_ ext{erasure} = 2.19(2) imes 10^{-3}$ per gate while the residual errors are $\sim 40$ times lower. We further demonstrate mid-circuit detection of erasure errors while introducing $< 0.1\%$ dephasing error per check. Finally, we show that the suppression of transmon noise allows this dual-rail qubit to preserve high coherence over a broad tunable operating range, offering an improved capacity to avoid frequency collisions. This work establishes transmon-based dual-rail qubits as an attractive building block for hardware-efficient quantum error correction.

Motivation & Objective

• Motivate erasure qubits as a path to relaxed error-correction thresholds.
• Show that a dual-rail qubit converts transmon T1 decay into detectable erasure errors.
• Demonstrate millisecond-scale coherence within the dual-rail subspace while erasure errors dominate.
• Demonstrate mid-circuit erasure detection with low dephasing.
• Show robustness of dual-rail operation across a broad tunable range.

Proposed method

• Use two resonantly-coupled transmons to encode the dual-rail qubit in the symmetric and antisymmetric states |0L> and |1L> derived from |01> and |10>.
• Couple Q1 and Q2 on resonance with a coupling strength g, yielding an energy gap ED R ≈ sqrt((2g)^2 + δ^2).
• Perform single-qubit gates by flux modulation of Q2 at frequency 2g/2π = 180 MHz.
• Initialize and read out by adiabatically separating the transmons to map |0L>,|1L> to |01>,|10> and jointly read out.
• Implement mid-circuit erasure checks using an ancilla qubit Q3 with a dispersive shift that depends on whether the dual-rail is in |00> or in the logical subspace.
• Postselect coherence measurements against leakage using final readout and mid-circuit erasure checks to isolate subspace dynamics.

Experimental results

Research questions

• RQ1 Can a dual-rail qubit convert transmon T1 errors into detectable erasures with a large erasure bias?
• RQ2 What are the coherence properties of the dual-rail subspace when erasure errors dominate over residual subspace errors?
• RQ3 Can mid-circuit erasure detection be performed with low dephasing and high fidelity?
• RQ4 Is the dual-rail qubit robust to a broad range of operating points away from sweet spots?
• RQ5 What are the gate fidelities and erasure/error rates under randomized benchmarking with erasure checks?

Key findings

• Erasure error probability per gate is p_erasure = 2.19(2) × 10^-3 for X90 gates.
• Residual (non-erasure) error rate per X90 gate is 5.06(6) × 10^-5, giving an erasure noise bias of 43(1).
• Mid-circuit erasure checks achieve <0.1% dephasing error per check while detecting erasures.
• Dual-rail T1 extrapolates to 906(15) μs, with T2(CPM G) within the dual-rail subspace reaching 0.543–1.25 ms depending on N (CPMG).
• Erasure lifetime Teras ~ 30 μs, enabling erasure noise bias T2/Teras ≳ 20 for idling errors.
• The dual-rail coherence remains hundreds of microseconds over a 350 MHz range of operating points, except near a TLS-induced dip at 4.96 GHz.