[Paper Review] Experimentally verified, fast analytic and numerical design of superconducting resonators in flip-chip architectures

Hang-Xi Li, Daryoush Shiri+11 more|arXiv (Cornell University)|May 9, 2023

Physics of Superconductivity and Magnetism34 references4 citations

TL;DR

This paper presents a fast, analytic design method for superconducting coplanar waveguide resonators in flip-chip quantum processors using conformal mapping and 2D cross-sectional simulations. It achieves <2% frequency error (better than 100 MHz) between designed and measured resonant frequencies in 15 fabricated devices, while reducing sensitivity to inter-chip spacing via a partial ground-plane cutout.

ABSTRACT

In superconducting quantum processors, the predictability of device parameters is of increasing importance as many labs scale up their systems to larger sizes in a 3D-integrated architecture. In particular, the properties of superconducting resonators must be controlled well to ensure high-fidelity multiplexed readout of qubits. Here we present a method, based on conformal mapping techniques, to predict a resonator's parameters directly from its 2D cross-section, without computationally heavy and time-consuming 3D simulation. We demonstrate the method's validity by comparing the calculated resonator frequency and coupling quality factor with those obtained through 3D finite-element-method simulation and by measurement of 15 resonators in a flip-chip-integrated architecture. We achieve a discrepancy of less than 2% between designed and measured frequencies, for 6-GHz resonators. We also propose a design method that reduces the sensitivity of the resonant frequency to variations in the inter-chip spacing.

Motivation & Objective

• Address the growing need for predictable, high-fidelity device parameters in large-scale 3D-integrated superconducting quantum processors.
• Overcome the computational burden of full 3D electromagnetic simulations for resonator design.
• Enable rapid, accurate prediction of resonant frequency ($f_r$) and coupling quality factor ($Q_c$) from 2D cross-sections.
• Reduce resonator frequency sensitivity to inter-chip spacing variations in flip-chip architectures.
• Validate the method experimentally across 15 fabricated resonators in a real flip-chip quantum processor.

Proposed method

• Apply conformal mapping techniques to transform the 2D cross-section of a coplanar waveguide (CPW) resonator into a parallel-plate geometry, enabling analytic calculation of $f_r$ and $Q_c$.
• Incorporate kinetic inductance and penetration depth effects into the analytic model to improve accuracy.
• Use 2D finite-element method (FEM) simulations on the cross-section to compute $f_r$ and $Q_c$, serving as a faster alternative to 3D FEM.
• Design a partial ground-plane cutout beneath the resonator to reduce frequency sensitivity to inter-chip spacing $h_s$.
• Compare results from conformal mapping, 2D FEM, 3D FEM, and experimental measurements to validate accuracy.
• Use participation ratio analysis to estimate $Q_{pr}$ from lossy dielectric interfaces in the cross-section.

Experimental results

Research questions

• RQ1 Can conformal mapping and 2D cross-sectional analysis predict resonant frequency and coupling quality factor with sufficient accuracy to replace time-consuming 3D simulations in flip-chip resonator design?
• RQ2 How does the inclusion of kinetic inductance and penetration depth affect the accuracy of analytic frequency predictions?
• RQ3 To what extent can inter-chip spacing variations affect the resonant frequency of flip-chip-integrated resonators?
• RQ4 Can a partial ground-plane cutout design reduce the sensitivity of the resonant frequency to inter-chip spacing?
• RQ5 What is the discrepancy between designed, simulated (2D and 3D), and measured resonant frequencies in real fabricated devices?

Key findings

• The conformal mapping method predicts resonant frequency with an error of less than 100 MHz, corresponding to <2% discrepancy between designed and measured frequencies for 6-GHz resonators.
• 2D FEM simulations achieve comparable accuracy to 3D FEM simulations but reduce computational cost by a factor of 1000 in both CPU time and memory usage.
• The proposed partial ground-plane cutout design reduces the resonant frequency’s sensitivity to inter-chip spacing, maintaining frequency stability even when $h_s$ varies.
• The cross-sectional Q-factor ($Q_{pr}$) is slightly lower when the resonator faces a dielectric substrate compared to a metal ground plane, with a significant drop when facing metal at small $h_s$ due to enhanced electric fields at metal-air interfaces.
• Experimental measurements of 15 aluminum resonators in a flip-chip architecture confirm the model’s accuracy, with excellent agreement between design, 2D simulation, and measured $f_r$.
• The method enables fast, scalable design of resonators for large-scale quantum processors by replacing computationally expensive 3D simulations with efficient 2D analysis.