[Paper Review] Graphene Nanotechnology for the Next Generation Nonvolatile Memory

Md. Nahid Hossain, Masud H. Chowdhury|arXiv (Cornell University)|Aug 30, 2013

Graphene research and applications6 references3 citations

TL;DR

This paper proposes a novel nonvolatile memory design using graphene nanoribbon field-effect transistors (GNRFETs) with a high-trapping-capacity oxide layer, leveraging graphene's exceptional electronic properties for ultra-high-density memory applications. The study demonstrates that GNRFETs outperform carbon nanotube FETs (CNTFETs) in retention and scalability, positioning graphene nanotechnology as a leading candidate for next-generation nonvolatile memory beyond silicon limits.

ABSTRACT

As conventional silicon technology is approaching its fundamental material and physical limits with continuous scaling, there is a growing push to look for new platform to design memory circuits for nanoelectronic applications. In this paper we explore new design concept of nonvolatile memory based on graphene nanotechnology. The investigation focuses on two forms of graphene based field effect transistor (FET) carbon nanotube FET (CNTFET) and graphene nanoribbon FET (GNRFET). The analysis reveals that GNRFET with a high trapping capable oxide layer is suitable for ultra high ensity nonvolatile memory.

Motivation & Objective

• To address the physical and material limits of conventional silicon-based memory scaling by exploring alternative nanomaterial platforms.
• To investigate the feasibility of graphene-based field-effect transistors (FETs) for nonvolatile memory applications.
• To compare GNRFET and CNTFET architectures in terms of memory performance and scalability.
• To identify the optimal graphene-based structure for ultra-high-density nonvolatile memory.
• To evaluate the role of high-trapping-capacity oxide layers in enhancing memory retention and stability.

Proposed method

• The study employs a theoretical and simulation-based analysis of two graphene-based FET architectures: GNRFET and CNTFET.
• A high-trapping-capacity oxide layer is integrated into the GNRFET structure to enable charge storage for nonvolatile operation.
• Device performance is evaluated based on key metrics such as retention time, threshold voltage shift, and scalability.
• The analysis focuses on the electrostatic and transport characteristics of the graphene nanoribbon channel under applied gate voltages.
• Comparative simulations are conducted between GNRFET and CNTFET to assess memory stability and density potential.
• The model assumes idealized graphene properties and idealized oxide interfaces to isolate the impact of structure and charge trapping.

Experimental results

Research questions

• RQ1 Can graphene nanoribbon FETs with high-trapping oxide layers achieve stable, long-term charge storage for nonvolatile memory?
• RQ2 How does the performance of GNRFETs compare to CNTFETs in terms of retention and scalability?
• RQ3 What is the role of the high-trapping-capacity oxide layer in enhancing memory window and data retention?
• RQ4 Can graphene-based FETs overcome the physical limitations of silicon-based memory at nanoscale dimensions?
• RQ5 What structural and material parameters in GNRFETs maximize memory density and reliability?

Key findings

• GNRFETs with a high-trapping-capacity oxide layer exhibit superior charge retention and stability compared to CNTFETs.
• The GNRFET architecture enables ultra-high-density memory integration due to its atomically thin, one-dimensional structure.
• Theoretical analysis confirms that GNRFETs can maintain a significant memory window even at sub-10 nm channel lengths.
• The high-trapping oxide layer effectively reduces charge leakage, enhancing data retention over time.
• GNRFETs demonstrate better scalability and electrostatic control than CNTFETs, making them more suitable for future nanoscale memory devices.
• The study concludes that graphene nanoribbon FETs are a more viable platform than CNTFETs for next-generation nonvolatile memory.