[Paper Review] Multi-level resistance switching and random telegraph noise analysis of nitride based memristors

Nikolaos Vasileiadis, Panagiotis Loukas+8 more|arXiv (Cornell University)|Mar 17, 2021

Advanced Memory and Neural Computing62 references24 citations

TL;DR

This study demonstrates multi-level resistance switching in silicon nitride-based memristors using Cu/SiNx/Si structures, achieving precise analog tuning via a flexible pulse protocol under space-charge-limited current conditions. Key results include stable multi-level operation, retention over time, and detailed analysis of random telegraph noise (RTN) revealing two distinct trap levels with activation energies of 0.62–0.71 eV, confirming trap-mediated switching mechanisms.

ABSTRACT

Resistance switching devices are of special importance because of their application in resistive memories (RRAM) which are promising candidates for replacing current nonvolatile memories and realize storage class memories. These devices exhibit usually memristive properties with many discrete resistance levels and implement artificial synapses. The last years, researchers have demonstrated memristive chips as accelerators in computing, following new in-memory and neuromorphic computational approaches. Many different metal oxides have been used as resistance switching materials in MIM or MIS structures. Understanding of the mechanism and the dynamics of resistance switching is very critical for the modeling and use of memristors in different applications. Here, we demonstrate the bipolar resistance switching of silicon nitride thin films using heavily doped Si and Cu as bottom and top-electrodes, respectively. Analysis of the current-voltage characteristics reveal that under space-charge limited conditions and appropriate current compliance setting, multi-level resistance operation can be achieved. Furthermore, a flexible tuning protocol for multi-level resistance switching was developed applying appropriate SET/RESET pulse sequences. Retention and random telegraph noise measurements performed at different resistance levels. The present results reveal the attractive properties of the examined devices.

Motivation & Objective

• To investigate multi-level resistance switching in silicon nitride-based memristors for use in neuromorphic and in-memory computing.
• To develop a flexible pulse protocol enabling precise, analog tuning of resistance levels.
• To analyze retention and random telegraph noise (RTN) characteristics across multiple resistance states.
• To identify trap energy levels and dynamics via RTN spectral analysis and dwell time distribution.
• To compare device behavior between symmetric and asymmetric bottom electrode structures (with and without SiO2 interlayer).

Proposed method

• Fabricated Cu/SiNx/Si and Cu/SiNx/SiO2/Si memristors using LPCVD Si3N4 and sputtered Cu/Pt electrodes on n++-Si substrates.
• Employed a custom experimental setup with DAQ-card, I/V converter, and NMOS/PMOS current compliance for precise voltage and current control.
• Implemented a filamentary-change sensitive algorithm using small voltage steps to dynamically tune resistance to target levels.
• Conducted DC I-V measurements to identify conduction mechanisms under space-charge-limited current (SCLC) conditions.
• Performed RTN measurements at 200 kΩ state for 100 s with 25 μs sampling, using digital oscilloscope and I/V converter.
• Analyzed RTN data via power spectral density (PSD) in log-log plots, fitting to generalized power-law model to extract trap parameters.
• Used weighted time lag plots (wTLP) and Poisson fitting to identify discrete current levels and estimate trap dwell times.
• Applied Arrhenius relation to extract trap activation energies from temperature-dependent dwell times.

Experimental results

Research questions

• RQ1 Can multi-level resistance switching be achieved in SiNx-based memristors using a flexible pulse protocol under SCLC conditions?
• RQ2 How do retention and random telegraph noise (RTN) characteristics vary across different resistance levels in SiNx memristors?
• RQ3 What are the dominant trap energy levels and their dynamics in the SiNx memristor channel?
• RQ4 How does the presence of a thermally grown SiO2 interlayer affect RTN behavior and trap characteristics?
• RQ5 To what extent do the RTN spectral characteristics (PSD slope, dwell times) indicate single or multiple trap levels?

Key findings

• Multi-level resistance switching was successfully achieved in SiNx memristors using a flexible pulse protocol with precise compliance current control.
• The devices exhibited space-charge-limited current (SCLC) conduction, enabling stable analog resistance tuning across multiple levels.
• RTN measurements revealed two distinct current levels at 200 kΩ state, with mean currents of 382 nA and 407 nA for S1, and 393 nA and 410 nA for S2.
• Low-frequency PSD slope was close to 1 (0.858 for S1, 0.805 for S2), indicating flicker noise behavior, while high-frequency slopes were 1.741 and 1.291, respectively.
• Dwell time constants for the two RTN levels were 0.0028 s and 0.077 s for S1, and 0.0078 s and 0.0042 s for S2, indicating different trap lifetimes.
• Trap activation energies were estimated at 0.622 eV and 0.708 eV for S1, and 0.648 eV and 0.632 eV for S2, confirming the presence of multiple trap levels with distinct energy depths.