[Paper Review] Programmable RO (PRO): A Multipurpose Countermeasure against Side-channel and Fault Injection Attack

Yuan Yao, Pantea Kiaei+3 more|arXiv (Cornell University)|Jun 25, 2021

Cryptographic Implementations and Security4 citations

TL;DR

This paper proposes Programmable Ring Oscillator (PRO), a low-overhead, multipurpose hardware primitive that simultaneously provides active side-channel countermeasures and real-time fault injection detection. By dynamically varying oscillation frequency to inject power noise and monitoring frequency shifts across an on-chip PRO array, the method detects electromagnetic and power glitch faults while significantly reducing power-based side-channel leakage, validated on an FPGA prototype with 100% fault detection accuracy.

ABSTRACT

Side-channel and fault injection attacks reveal secret information by monitoring or manipulating the physical effects of computations involving secret variables. Circuit-level countermeasures help to deter these attacks, and traditionally such countermeasures have been developed for each attack vector separately. We demonstrate a multipurpose ring oscillator design - Programmable Ring Oscillator (PRO) to address both fault attacks and side-channel attacks in a generic, application-independent manner. PRO, as an integrated primitive, can provide on-chip side-channel resistance, power monitoring, and fault detection capabilities to a secure design. We present a grid of PROs monitoring the on-chip power network to detect anomalies. Such power anomalies may be caused by external factors such as electromagnetic fault injection and power glitches, as well as by internal factors such as hardware Trojans. By monitoring the frequency of the ring oscillators, we are able to detect the on-chip power anomaly in time as well as in location. Moreover, we show that the PROs can also inject a random noise pattern into a design's power consumption. By randomly switching the frequency of a ring oscillator, the resulting power-noise pattern significantly reduces the power-based side-channel leakage of a cipher. We discuss the design of PRO and present measurement results on a Xilinx Spartan-6 FPGA prototype, and we show that side-channel and fault vulnerabilities can be addressed at a low cost by introducing PRO to the design. We conclude that PRO can serve as an application-independent, multipurpose countermeasure.

Motivation & Objective

• To address the lack of generic, low-overhead circuit-level countermeasures that simultaneously defend against both side-channel and fault injection attacks.
• To enable application-independent, on-chip monitoring of power network anomalies caused by electromagnetic, power, or internal fault injections.
• To reduce power-based side-channel leakage through active noise injection using programmable frequency modulation.
• To develop a scalable, real-time secure monitoring network using an array of PROs for spatial and temporal coverage of on-chip power dynamics.
• To demonstrate feasibility and effectiveness of PRO in a real FPGA-based prototype with measurable detection and masking performance.

Proposed method

• Design of a programmable ring oscillator (PRO) with user-controllable oscillation frequency to inject random power noise into the circuit.
• Use of on-chip PROs as power sensors by reading counter values to infer real-time frequency changes indicative of power anomalies.
• Deployment of a grid of 36 PROs across an FPGA floorplan to enable spatially resolved monitoring of power distribution network (PDN) fluctuations.
• Implementation of real-time counter monitoring via UART to detect abnormal frequency shifts or counter overflow due to fault injection.
• Integration of PROs within a secure design to mask side-channel leakage by randomizing power consumption patterns.
• Use of a reference counter and frequency calculation to enable precise, continuous monitoring of PRO behavior under normal and attack conditions.

Experimental results

Research questions

• RQ1 Can a single, programmable hardware primitive effectively defend against both side-channel and fault injection attacks with low area and power overhead?
• RQ2 To what extent can dynamic frequency modulation of ring oscillators reduce power-based side-channel leakage in cryptographic circuits?
• RQ3 Can an array of PROs provide real-time, spatially localized detection of electromagnetic fault injection and power glitches on the PDN?
• RQ4 How accurately can PRO counters detect fault-induced anomalies such as frequency shifts or counter overflow during fault injection attacks?
• RQ5 Can the PRO-based monitoring network be integrated into larger systems like SoCs for comprehensive runtime security?

Key findings

• The PRO design successfully masks side-channel leakage by injecting random frequency noise, significantly reducing power-based side-channel information leakage.
• The PRO array achieved 100% detection rate for electromagnetic fault injection (EMFI) attacks, with observable frequency shifts and counter overflow events.
• Frequency distribution shifts were consistently observed in 32 out of 36 PROs during EMFI, with RO-23 to RO-27 and RO-31 to RO-36 showing extreme counter value jumps to ~4.08×10⁷ MHz when faults were injected.
• The PRO-based monitoring network provided both temporal and spatial coverage of on-chip power anomalies, enabling detection of faults at specific locations such as location-3 in the floorplan.
• The prototype demonstrated that a single PRO structure can serve dual purposes: side-channel countermeasure and fault detection, with minimal area and power overhead.
• The method enables real-time, user-controllable monitoring and configuration of PROs, supporting integration into complex SoC designs for runtime security.