[Paper Review] Quantum circuit for a direct sum of two-dimensional unitary operators

Ville Bergholm, Juha J. Vartiainen+2 more|arXiv (Cornell University)|Oct 9, 2004

Quantum Computing Algorithms and Architecture5 citations

TL;DR

This paper presents a quantum circuit construction for uniformly controlled one-qubit gates—n-qubit quantum gates that are direct sums of two-dimensional unitary operators—using 2^{n-1} - 1 CNOT gates, 2^{n-1} one-qubit gates, and one n-qubit diagonal gate. The method, based on a modified quantum multiplexor, achieves improved or matching gate count bounds for decomposing general n-qubit gates and state preparation, with optimized implementations using only nearest-neighbor interactions.

ABSTRACT

In this article we study n-qubit quantum gates which may be represented as direct sums of two-dimensional unitary operators. We call this class of gates uniformly controlled one-qubit gates. We present a quantum circuit which implements any gate of this type using 2^{n-1} - 1 controlled-NOT gates, 2^{n-1} one-qubit gates and a single n-qubit diagonal gate. The construction is based on a modified version of the so-called quantum multiplexor circuit. We illustrate the versatility of the uniformly controlled gates by applying them to the decomposition of a general n-qubit gate and an n-qubit state-preparation procedure. Moreover, we study the implementation of these circuits using only nearest-neighbor gates and give the worst-case one-qubit and CNOT gate counts for all of the aforementioned applications. In all four cases, the proposed method either improves or achieves the previously reported upper bounds for the gate counts.

Motivation & Objective

• To develop an efficient quantum circuit implementation for n-qubit gates that are direct sums of two-dimensional unitary operators, known as uniformly controlled one-qubit gates.
• To minimize the number of CNOT and one-qubit gates required for such gates, especially under nearest-neighbor coupling constraints.
• To apply the proposed circuit to decompose general n-qubit unitary gates and to implement n-qubit state-preparation procedures with improved gate count efficiency.
• To establish tight upper bounds on gate counts for all considered applications, improving upon previously reported results.

Proposed method

• The construction uses a modified quantum multiplexor architecture to decompose uniformly controlled one-qubit gates into a sequence of 2^{n-1} - 1 controlled-NOT gates, 2^{n-1} one-qubit gates, and a single n-qubit diagonal gate.
• The method leverages the structure of direct sum unitaries to reduce gate overhead by exploiting conditional control based on computational basis states.
• The circuit is adapted for nearest-neighbor architectures by reordering and optimizing gate sequences to respect qubit connectivity constraints.
• The decomposition is applied to general n-qubit gates via block-diagonalization and to state preparation by encoding target states in the unitary’s action on the |0⟩ state.
• Gate counts are analyzed and optimized for worst-case scenarios, ensuring minimal resource usage under physical qubit constraints.

Experimental results

Research questions

• RQ1 What is the minimal number of CNOT and one-qubit gates required to implement a uniformly controlled one-qubit gate?
• RQ2 How can such gates be efficiently decomposed when only nearest-neighbor two-qubit interactions are allowed?
• RQ3 Can this circuit construction improve or match existing upper bounds for decomposing general n-qubit unitary gates?
• RQ4 Can the same framework be used to optimize n-qubit state-preparation procedures with reduced gate counts?

Key findings

• The proposed circuit implements any uniformly controlled one-qubit gate using exactly 2^{n-1} - 1 CNOT gates, 2^{n-1} one-qubit gates, and one n-qubit diagonal gate.
• The method achieves improved or matching upper bounds on gate counts for both general n-qubit gate decomposition and n-qubit state preparation.
• When restricted to nearest-neighbor interactions, the construction maintains optimal or near-optimal gate counts in the worst-case scenario.
• The circuit structure enables efficient implementation of arbitrary direct sum unitaries, which are fundamental building blocks in quantum algorithm design.