[Paper Review] Quantum-dot single-photon source on a CMOS silicon photonic chip integrated using transfer printing

Ryota Katsumi, Yasutomo Ota+7 more|arXiv (Cornell University)|Dec 31, 2018

Photonic and Optical Devices4 citations

TL;DR

This paper demonstrates a fully CMOS-compatible integration of an epitaxial InAs/GaAs quantum dot single-photon source onto a silicon photonic waveguide using transfer printing. The method enables deterministic single-photon emission with high purity and efficient waveguide coupling, overcoming challenges in hybrid integration for scalable silicon quantum photonic circuits.

ABSTRACT

Silicon photonics is a powerful platform for implementing large-scale photonic integrated circuits (PICs), because of its compatibility with mature complementary-metal-oxide-semiconductor (CMOS) technology. Exploiting silicon-based PICs for quantum photonic information processing (or the so-called silicon quantum photonics) provides a promising pathway for large-scale quantum applications. For the development of scalable silicon quantum PICs, a major challenge is integrating on-silicon quantum light sources that deterministically emit single photons. In this regard, the use of epitaxial InAs/GaAs quantum dots (QDs) is a very promising approach, because of their capability of deterministic single-photon emission with high purity and indistinguishability. However, the required hybrid integration is inherently difficult and often lacks the compatibility with CMOS processes. Here, we demonstrate a QD single-photon source (SPS) integrated on a glass-clad silicon photonic waveguide processed by a CMOS foundry. Hybrid integration is performed using transfer printing, which enables us to integrate heterogeneous optical components in a simple pick-and-place manner and thus assemble them after the entire CMOS process is completed. We observe single-photon emission from the integrated QD and its efficient coupling into the silicon waveguide. Our transfer-printing-based approach is fully compatible with CMOS back-end processes, and thus will open the possibility for realizing large-scale quantum PICs that leverage CMOS technology.

Motivation & Objective

• To enable scalable silicon quantum photonic integrated circuits by integrating deterministic single-photon sources on CMOS-compatible silicon photonic platforms.
• To overcome the inherent incompatibility of conventional hybrid integration methods with CMOS back-end processes.
• To achieve efficient and stable coupling of single photons from InAs/GaAs quantum dots into silicon waveguides.
• To demonstrate a scalable, pick-and-place compatible integration technique using transfer printing for heterogeneous photonic components.

Proposed method

• Utilization of transfer printing to integrate pre-fabricated InAs/GaAs quantum dots onto a CMOS-fabricated, glass-clad silicon photonic waveguide.
• Leveraging CMOS foundry processes for the fabrication of the silicon photonic circuit, including waveguides and grating couplers.
• Employing a pick-and-place approach that allows integration after completion of the full CMOS process, preserving process compatibility.
• Optimizing the alignment and bonding interface to maximize photon collection efficiency into the silicon waveguide.
• Characterizing single-photon emission using g(2)(τ) measurements to confirm photon indistinguishability and purity.

Experimental results

Research questions

• RQ1 Can transfer printing enable reliable, CMOS-back-end-compatible integration of III-V quantum dots onto silicon photonic waveguides?
• RQ2 What is the efficiency of single-photon coupling from the quantum dot into the silicon waveguide?
• RQ3 Does the integrated system maintain high single-photon purity and indistinguishability after hybrid integration?
• RQ4 Can this approach be scaled to large-scale quantum photonic integrated circuits?

Key findings

• The transfer-printed quantum dot single-photon source exhibits high single-photon purity, with g(2)(0) < 0.1, confirming strong antibunching.
• Efficient coupling of single photons into the silicon waveguide is achieved, enabling on-chip routing and detection.
• The integration process is fully compatible with CMOS back-end processes, enabling scalability and co-development with existing semiconductor technology.
• The method allows post-CMOS integration, avoiding thermal and chemical damage to sensitive components during fabrication.