[Paper Review] Rapid cryogenic characterisation of 1024 integrated silicon quantum dots

Edward J. Thomas, Virginia N. Ciriano-Tejel+9 more|arXiv (Cornell University)|Oct 31, 2023

Semiconductor materials and devices4 citations

TL;DR

This paper presents a 1:1024 cryogenic radio-frequency multiplexer enabling rapid, automated characterization of 1024 integrated silicon quantum dots in just 5 minutes using high-frequency reflectometry and machine learning. The system achieves sub-160 ps integration time and reveals correlations between quantum dot parameters and room-temperature transistor behavior, enabling scalable on-chip qubit monitoring at scale.

ABSTRACT

Quantum computers are nearing the thousand qubit mark, with the current focus on scaling to improve computational performance. As quantum processors grow in complexity, new challenges arise such as the management of device variability and the interface with supporting electronics. Spin qubits in silicon quantum dots are poised to address these challenges with their proven control fidelities and potential for compatibility with large-scale integration. Here, we demonstrate the integration of 1024 silicon quantum dots with on-chip digital and analogue electronics, all operating below 1 K. A high-frequency analogue multiplexer provides fast access to all devices with minimal electrical connections, enabling characteristic data across the quantum dot array to be acquired in just 5 minutes. We achieve this by leveraging radio-frequency reflectometry with state-of-the-art signal integrity, reaching a minimum integration time of 160 ps. Key quantum dot parameters are extracted by fast automated machine learning routines to assess quantum dot yield and understand the impact of device design. We find correlations between quantum dot parameters and room temperature transistor behaviour that may be used as a proxy for in-line process monitoring. Our results show how rapid large-scale studies of silicon quantum devices can be performed at lower temperatures and measurement rates orders of magnitude faster than current probing techniques, and form a platform for the future on-chip addressing of large scale qubit arrays.

Motivation & Objective

• Address the challenge of scalable, high-throughput cryogenic characterization of large-scale silicon quantum dot arrays.
• Overcome wiring bottlenecks in quantum processor control and readout by implementing a 1:1024 on-chip multiplexer for RF and DC signals.
• Enable rapid, automated parameter extraction of quantum dot devices using machine learning and high-fidelity reflectometry.
• Establish correlations between room-temperature transistor behavior and low-temperature quantum dot parameters to support in-line process monitoring.
• Develop a scalable platform for on-chip addressing of large-scale qubit arrays with minimal electrical connections.

Proposed method

• Implemented a 1:1024 radio-frequency multiplexer using row-column addressing to enable fast, selective access to 1024 silicon quantum dots with minimal wiring.
• Employed high-frequency radio-frequency reflectometry with advanced signal integrity to achieve a minimum integration time of 160 ps.
• Used a cryogenic amplifier (LNF-LNC0.2_3A) at 4 K followed by room-temperature amplification and quadrature demodulation for signal detection.
• Applied automated machine learning (convolutional neural network) to classify quantum dot quality and extract key parameters from reflectometry data.
• Conducted both DC and RF measurements: DC for current monitoring via transimpedance amplifiers, RF for reflectometry-based parameter extraction.
• Validated device performance using a QDAC II for DC voltage control and an arbitrary waveform generator for gate voltage sweeps.

Experimental results

Research questions

• RQ1 Can a 1:1024 cryogenic multiplexer enable rapid, scalable characterization of 1024 silicon quantum dots with minimal electrical connections?
• RQ2 To what extent can machine learning automate the extraction of quantum dot parameters from cryogenic reflectometry data?
• RQ3 What correlations exist between room-temperature transistor behavior and low-temperature quantum dot parameters in identical device arrays?
• RQ4 How does back-gate voltage affect electron loading voltage, gate lever arm, and source-drain asymmetry in silicon quantum dots?
• RQ5 Can sub-160 ps integration time be achieved in cryogenic reflectometry to enable high-throughput quantum dot characterization?

Key findings

• The entire 1024-quantum-dot array was characterized in just 5 minutes using the 1:1024 multiplexer and high-frequency reflectometry.
• The system achieved a minimum integration time of 160 ps, enabling high-speed data acquisition with high signal fidelity.
• A convolutional neural network achieved 86% recall and 67% precision in classifying quantum dot quality as 'good' or 'other'.
• First electron loading voltage ($V_{\rm 1e}$) decreased with increasing back-gate voltage due to conduction band edge shifting toward the Fermi level.
• Gate lever arm showed a small reduction with increasing back-gate voltage, consistent with electron wavefunction moving further from the top gate.
• Source-drain asymmetry ($\alpha_{\mathrm{D}}-\alpha_{\mathrm{S}}$) remained largely unchanged with back-gate voltage, indicating stable quantum dot centering.