[Paper Review] TiCkS: A Flexible White-Rabbit Based Time-Stamping Board
TiCkS is a compact, FPGA-based White Rabbit node that achieves sub-nanosecond time-stamping precision for trigger signals in high-energy physics experiments. It uses a custom firmware on a Spartan-6 FPGA to timestamp input triggers with nanosecond accuracy, transmit timestamps via UDP over WR fiber, and support PPS and SPI for synchronization and control, demonstrating negligible event loss up to 320 kHz with stability below 1 ns across multiple boards.
We have developed the TiCkS board based on the White Rabbit (WR) SPEC node, to provide ns-precision time-stamps (TSs) of input signals (e.g., triggers from a connected device) and transmission of these TSs to a central collection point. TiCkS was developed within the specifications of the Cherenkov Telescope Array (CTA) as one of the candidate TS nodes, with a small form-factor allowing its use in any CTA camera. The essential part of this development concerns the firmware in its Spartan-6 FPGA, with the addition of: 1) a 1ns-precision TDC for the TSs; 2) a UDP stack to transmit TSs and auxiliary information over the WR fibre, and to receive configuration & slow control commands over the same fibre. It also provides a 1-PPS and other clock signals to the connected device, from which it can receive auxiliary event-type information over an SPI link. A version of TiCkS with an FMC connector will be made available in the WR OpenHardware repository, so allowing the use of a mezzanine card with varied formats of input/output connectors, providing a cheap, flexible, and reliable solution for ns-precision time-stamping of trigger signals up to 200 kHz, for use in other experiments.
Motivation & Objective
- To develop a low-cost, compact, and reliable time-stamping solution for the Cherenkov Telescope Array (CTA) with sub-nanosecond precision.
- To enable accurate relative time-stamping of trigger signals from telescopes to support software-based coincidence detection in event reconstruction.
- To provide a flexible, open-hardware platform for ns-precision time-stamping applicable beyond CTA.
- To ensure long-term reliability (15-year lifetime) for use in extreme environmental conditions.
Proposed method
- The TiCkS board is built on a modified White Rabbit SPEC node, with the PCIe and DDR3 components removed to reduce size and power consumption.
- A custom firmware implements a time-to-digital converter (TDC) with ns-precision for timestamping input triggers on two channels (read-out and busy triggers).
- A UDP stack enables transmission of timestamps and auxiliary data over the same WR fiber used for control and configuration.
- The board generates a PPS signal and 10 MHz clock synchronized to the central White Rabbit time reference, and supports SPI for receiving auxiliary event data from connected devices.
- The hardware is redesigned with 24V power support and a ruggedized connector for long-term operation in CTA camera environments.
- The design includes an FMC connector in a future version to allow flexible I/O via mezzanine cards.
Experimental results
Research questions
- RQ1Can a compact, low-power, and cost-effective time-stamping node achieve sub-nanosecond precision in a high-precision timing network?
- RQ2How does the TiCkS board perform under high trigger rates typical of CTA operations, particularly in terms of event loss and timestamp stability?
- RQ3Can the TiCkS board maintain nanosecond-level synchronization accuracy between multiple nodes in a distributed system?
- RQ4What is the effective dead-time and event loss rate of the time-stamping mechanism at increasing trigger frequencies?
- RQ5Can the board support both fixed-frequency and random trigger inputs with minimal timing jitter and high reliability?
Key findings
- The TiCkS board achieves time-stamping precision with a relative accuracy of less than 1 ns between multiple boards, even under varying cable delays.
- No event loss was observed at trigger rates up to 320 kHz, with a slight increase in loss at 400 kHz, indicating a practical operating limit near 320 kHz.
- The system maintains negligible dead-time effects, with an equivalent dead-time of less than 1 ns at 19 kHz, which is negligible compared to the required ~30 ns dead-time for shower rejection.
- The distribution of inter-event times (ΔTintra) for random triggers is well-fitted by an exponential, confirming stable and uncorrelated event handling.
- The PPS and 10 MHz clock outputs are precisely aligned, with a measured offset of less than 1 ns, confirming accurate synchronization.
- The firmware and hardware design are robust enough to support long-term deployment (15-year lifetime) in harsh environments, with plans to release the design on the WR OpenHardware repository.
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This review was created by AI and reviewed by human editors.