[Paper Review] Tiramisu: a polyhedral compiler for expressing fast and portable code

Riyadh Baghdadi, Jessica M. Ray+7 more|arXiv (Cornell University)|Feb 16, 2019

Parallel Computing and Optimization TechniquesComputer Science43 references104 citations

TL;DR

Tiramisu is a polyhedral compiler that generates high-performance, portable code for multicore CPUs, GPUs, and distributed systems by combining a flexible polyhedral representation with a rich scheduling language. It achieves state-of-the-art performance in image processing, stencil computations, linear algebra, and deep learning across diverse architectures by decoupling algorithm, loop transformations, data layouts, and communication through a four-level intermediate representation.

ABSTRACT

This paper introduces Tiramisu, a polyhedral framework designed to generate high performance code for multiple platforms including multicores, GPUs, and distributed machines. Tiramisu introduces a scheduling language with novel extensions to explicitly manage the complexities that arise when targeting these systems. The framework is designed for the areas of image processing, stencils, linear algebra and deep learning. Tiramisu has two main features: it relies on a flexible representation based on the polyhedral model and it has a rich scheduling language allowing fine-grained control of optimizations. Tiramisu uses a four-level intermediate representation that allows full separation between the algorithms, loop transformations, data layouts, and communication. This separation simplifies targeting multiple hardware architectures with the same algorithm. We evaluate Tiramisu by writing a set of image processing, deep learning, and linear algebra benchmarks and compare them with state-of-the-art compilers and hand-tuned libraries. We show that Tiramisu matches or outperforms existing compilers and libraries on different hardware architectures, including multicore CPUs, GPUs, and distributed machines.

Motivation & Objective

• To address the challenge of writing portable, high-performance code for heterogeneous architectures in performance-critical domains like image processing, stencils, linear algebra, and deep learning.
• To enable fine-grained control over loop optimizations and data layout transformations while maintaining portability across diverse hardware platforms.
• To decouple algorithm specification from low-level implementation details such as scheduling and data layout through a four-level intermediate representation.
• To outperform existing compilers and hand-tuned libraries on multicore CPUs, GPUs, and distributed systems through automated yet precise optimization.
• To provide a unified framework that simplifies targeting multiple architectures without rewriting the core algorithm.

Proposed method

• The framework uses a four-level intermediate representation that separates algorithm definition, loop transformations, data layouts, and communication patterns.
• It employs a novel scheduling language with extensions to express complex optimizations for multicore, GPU, and distributed systems.
• The polyhedral model is used as a flexible foundation to represent and transform nested loops and data dependencies.
• The system supports automatic code generation for multiple back-ends, including CPUs, GPUs, and distributed clusters.
• Optimizations such as tiling, parallelization, vectorization, and data layout transformations are expressed through the scheduling language.
• The framework enables portable performance by decoupling high-level algorithm design from low-level hardware-specific details.

Experimental results

Research questions

• RQ1 Can a polyhedral compiler achieve performance comparable to or better than hand-tuned libraries and state-of-the-art compilers across diverse architectures?
• RQ2 To what extent can a single algorithm be efficiently targeted to multicore CPUs, GPUs, and distributed systems using a unified intermediate representation?
• RQ3 How effective is the proposed scheduling language in expressing complex optimizations for heterogeneous systems?
• RQ4 Can the separation of concerns in the four-level IR simplify porting and optimization without sacrificing performance?
• RQ5 Does the framework enable portable high-performance code generation in domains such as image processing, deep learning, and linear algebra?

Key findings

• Tiramisu matches or outperforms existing compilers and hand-tuned libraries on multicore CPUs, GPUs, and distributed machines across image processing, deep learning, and linear algebra workloads.
• The four-level intermediate representation successfully decouples algorithm logic from scheduling and data layout, enabling efficient porting across diverse architectures.
• The scheduling language allows fine-grained control over optimizations, supporting complex transformations required for high performance on heterogeneous systems.
• The framework achieves high performance without requiring manual low-level tuning, demonstrating the effectiveness of its automated yet expressive optimization pipeline.
• Tiramisu enables portable, high-performance code generation across multiple platforms, reducing the need for architecture-specific hand-optimization.
• Evaluation on real-world benchmarks confirms that Tiramisu delivers competitive or superior performance compared to state-of-the-art tools in all target domains.