Ulsan National Institute of Science and Technology · Engineering
Professor Tae-Sik Yoon's research lab specializes in the development and characterization of nanoscale resistive and capacitive memory devices for neuromorphic computing and next-generation nonvolatile memory applications. The lab focuses on designing oxide-based memristors and memcapacitors using materials such as NiOx, CeO₂, HfO₂, and Fe₂O₃, with an emphasis on analog, reversible, and stable resistance and capacitance switching. Key research directions include engineering interface and interfacial phenomena, controlling oxygen ion migration, and achieving synaptic plasticity mimicking in solid-state devices through tailored voltage pulse protocols.
Figures are computed from collected data and may differ slightly.
The thickness-dependent digital versus analog resistive switching of nickel oxide (NiOx) nanoparticle assemblies was investigated in a Ti/NiOx/Pt structure. The NiOx nanoparticles were chemically synthesized with ∼5 nm diameter. The Ti/NiOx/Pt structure with assembly thickness of ∼60 nm exhibited the digital-type bipolar resistive switching. However, the assembly with a thickness of ∼90 nm presented analog resistive switching with gradually decreasing resistance when sweeping −V while increasing
We demonstrate strong, analog, reversible, and nonvolatile memcapacitance in a Si-based MOS (metal-oxide-semiconductor) memcapacitor with an ITO (In-Sn-O)/HfOx/Si structure. Both accumulation and depletion capacitances change sequentially and reversibly upon repeating voltage application with respect to voltage polarity. This memcapacitance is thought to be induced by oxygen ions' migration between ITO and HfOx layers, which changes the HfOx permittivity and the depletion states in Si and ITO. T
Artificial synaptic potentiation and depression characteristics were demonstrated with Pt/CeO<sub>2</sub>/Pt devices exhibiting polarity-dependent analog memristive switching. The strong and sequential resistance change with its maximum to minimum ratio >10<sup>5</sup>, imperatively essential for stable operation, as repeating voltage application, emulated the potentiation and depression motion of a synapse with variable synaptic weight. The synaptic weight change could be controlled by the ampl
Abstract The adsorption behavior of colloidal maghemite (γ‐Fe 2 O 3 ) nanoparticles, passivated by oleic acid and dispersed in octane solution, onto three different substrates (Si, Si 3 N 4 , and SiO 2 ) is investigated. The average nanoparticle size is 10 nm, with a size variation (σ) less than 5 %. The adsorption of particles is strongly dependent on both the type of substrate and the particle concentration in solution. By a single‐dipping process, we have obtained a maximum coverage of 0.45 o
Tunable threshold resistive switching characteristics of Pt-Fe(2)O(3) core-shell nanoparticle (NP) assembly were investigated. The colloidal Pt-Fe(2)O(3) core-shell NPs with a Pt core diameter of ∼3 nm and a total diameter of ∼15 nm were chemically synthesized by a one-step process. These NPs were assembled as a layer with a thickness of ∼80 nm by repeated dip-coating between Ti and Pt electrodes on a flexible polyethersulfone (PES) substrate. The Ti/NPs/Pt/PES structure exhibited the threshold
Analog synaptic weight modulation that is linear, symmetric, and exhibits long-term stability is demonstrated by the resistance changes in a Pt/indium-tin-oxide (ITO)/CeO2/Pt memristor. Distinct from a Pt/CeO2/Pt memristor without the ITO layer, which shows highly nonlinear and asymmetric resistance changes, the Pt/ITO/CeO2/Pt memristor exhibits linear and symmetric resistance changes in proportion to the number of voltage applications with opposite polarities for potentiation and depression beh
We demonstrate single- and double-gate synaptic operations of a thin-film transistor (TFT) with double-gate stack consisting of an Al-top-gate/SiO <sub>x</sub> /TaO <sub>x</sub> /n-IGZO on a SiO<sub>2</sub>/n<sup>+</sup>-Si-bottom-gate substrate. This synaptic TFT exhibits a tunable drain current, mimicking synaptic weight modulation in the biological synapse, upon repeatedly applying gate and drain voltages. The drain current modulation features are analog, voltage-polarity dependently reversib
Forming-free, low-voltage, and high-speed resistive switching is demonstrated in an Ag/oxygen-deficient vanadium oxide (VO<sub><i>x</i></sub>)/Pt device via the facilitated formation and rupture of Ag filaments. Direct current (DC) voltage sweep measurements exhibit forming-free switching from a high-resistance state (HRS) to a low-resistance state (LRS), called SET, at an average V<sub>SET</sub> of +0.23 V. The reverse RESET transition occurs at an average V<sub>RESET</sub> of -0.07 V with a lo
The authors studied the selective growth of Ge islands by molecular beam epitaxy on Si(001) covered with nanometer-scale patterned SiO2 mask generated using self-assembled diblock copolymer. Selective growth is made possible by Ge adatoms desorbing from the SiO2 surface as well as diffusing into the exposed Si area. For the Ge coverage of 2nm, multiple islands are observed along the periphery of individual exposed Si areas. At 3.5nm coverage, the coalescence of small islands with significant str
Abstract Nonvolatile memory and synaptic characteristics in thin‐film transistors (TFTs) with HfOx gate insulator and ZnO channel are investigated for the application to nonvolatile memory and artificial synapse in neuromorphic systems. Nonvolatile change of drain current induced by modulated gate stack properties is demonstrated to be applicable to nonvolatile memory operation. It also emulates synaptic weight change for learning and memory functions in artificial synapses. The TFTs with HfOx a
The process to make nanocrystals with an average size &lt;5 nm and a spatial density &gt;1012/cm2 was proposed using agglomeration and partial oxidation of thin amorphous Si0.7Ge0.3 layer deposited in between the SiO2 layers by low pressure chemical vapor deposition. The reason to use an amorphous layer is to make it possible to deposit a thin continuous layer with a thickness of less than 5 nm. Si0.7Ge0.3 alloy layer was used to control the spatial density of the nanocrystals by using s
We investigate the surface roughness and dislocation distribution of compositionally graded relaxed SiGe buffer layers by inserting two tensile-strained Si layers. The 20nm thick strained Si layers, less than the critical thickness for dislocation formation, are inserted at 10 and 20% Ge content regions of the 1μm thick graded SiGe layer with a final Ge content of 30%. The surface immediately after growing the second strained Si layer on SiGe with 20% Ge content is found to be flat with about 1.
Diffusive memristor-based threshold switching devices are promising candidates for selectors in the crossbar memory architecture. However, the reliability and uniformity of the devices are primary concerns due to uncontrolled diffusion of metal ions in the solid electrolyte of diffusive memristors. In this study, CeO2-based selectors with Ag electrodes were demonstrated to have forming-free threshold switching characteristics. In particular, by inserting an amorphous SiO2 layer in a CeO2-based s
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