Sam H. Noh
Ulsan National Institute of Science and Technology · Computer Science
About the Lab
Professor Sam H. Noh's research lab focuses on computer system optimization, particularly in memory hierarchy design, non-volatile main memory technologies, and efficient data management in file systems. The lab explores hybrid memory architectures—especially those combining DRAM and emerging non-volatile memories like PCM and STT-MRAM—to address performance and endurance challenges. Key research directions include intelligent buffer management, flash translation layer design, and journaling techniques that leverage non-volatile memory for faster and more reliable storage systems.
Research Overview
Research Output Trend
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Selected Papers
15Flash memory is becoming increasingly important as nonvolatile storage for mobile consumer electronics due to its low power consumption and shock resistance. However, it imposes technical challenges in that a write should be preceded by an erase operation, and that this erase operation can be performed only in a unit much larger than the write unit. To address these technical hurdles, an intermediate software layer called a flash translation layer (FTL) is generally employed to redirect logical
Efficient and effective buffering of disk blocks in main memory is critical for better file system performance due to a wide speed gap between main memory and hard disks. In such a buffering system, one of the most important design decisions is the block replacement policy that determines which disk block to replace when the buffer is full, In this paper, we show that there exists a spectrum of block replacement policies that subsumes the two seemingly unrelated and independent Least Recently Us
article Free Access Share on On the existence of a spectrum of policies that subsumes the least recently used (LRU) and least frequently used (LFU) policies Authors: Donghee Lee Dept. of Information Engineering, Cheju National University, Korea and Department of Computer Engineering, Seoul National University, Seoul 151-742, Korea Dept. of Information Engineering, Cheju National University, Korea and Department of Computer Engineering, Seoul National University, Seoul 151-742, KoreaView Profile
Journaling techniques are widely used in modern file systems as they provide high reliability and fast recovery from system failures. However, it reduces the performance benefit of buffer caching as journaling accounts for a bulk of the storage writes in real system environments. In this paper, we present a novel buffer cache architecture that subsumes the functionality of caching and journaling by making use of non-volatile memory such as PCM or STT-MRAM. Specifically, our buffer cache supports
Phase change memory (PCM) has emerged as one of the most promising technologies to incorporate into the memory hierarchy of future computer systems. However, PCM has two critical weaknesses to substitute DRAM memory in its entirety. First, the number of write operations allowed to each PCM cell is limited. Second, write access time of PCM is about 6–10 times slower than that of DRAM. To cope with this situation, hybrid memory architectures that use a small amount of DRAM together with PCM have b
In traditional file system implementations, the Least Recently Used (LRU) block replacement scheme is widely used to manage the buffer cache due to its simplicity and adaptability. However, the LRU scheme exhibits performance degradations because it does not make use of reference regularities such as sequential and looping references. In this paper, we present a Unified Buffer Management (UBM) scheme that exploits these regularities and yet, is simple to deploy. The UBM scheme automatically dete
Hybrid storage solutions use NAND flash memory based Solid State Drives (SSDs) as non-volatile cache and traditional Hard Disk Drives (HDDs) as lower level storage. Unlike a typical cache, internally, the flash memory cache is divided into cache space and overprovisioned space, used for garbage collection. We show that balancing the two spaces appropriately helps improve the performance of hybrid storage systems. We show that contrary to expectations, the cache need not be filled with data to th
The authors introduce a new type of combined SIMD/MIMD (single-instruction multiple-data/multiple-instruction multiple-data) architecture called a hybrid system. The hybrid system consists of two components. The first component is massively parallel and consists of a large number of slow processors that are organized in an SIMD architecture. The second component consists of only a few fast processors (possibly only one) which are organized in an MIMD architecture. The authors contend that a hybr
Cancer in inguinal hernias is rare. The author reports the first case of thymoma metastatic to an inguinal hernia sac (saccular) and the 13th case of colon cancer in an inguinal hernia (intrasaccular); both cases presented clinically as incarcerated hernias.
No abstract available.
The paper focuses on two points: (1) the prediction of the execution signature of massively parallel applications prior to execution/implementation based on a more informative characterization of the workload, and (2) the definition of a more general form of speedup and efficiency. The systems considered are of SIMD message passing paradigm.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
No abstract available.
Research Areas
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