Skip to main content

Tae‐Sik Yoon

Ulsan National Institute of Science and Technology · Engineering

About the Lab

Professor Tae-Sik Yoon's research lab specializes in the development and characterization of oxide-based resistive switching devices and memcapacitive systems for next-generation neuromorphic computing and nonvolatile memory applications. The lab focuses on engineering nanoscale materials—particularly transition metal oxides such as NiOx, HfOx, CeO₂, and Fe₂O₃—with precise control over stoichiometry, nanostructure, and interfacial properties to achieve analog, reversible, and nonvolatile switching behavior. Key research directions include designing bilayer and core-shell nanoparticle heterostructures for tunable resistive and memcapacitive responses, enabling synaptic plasticity emulation in artificial synapses.

memristive devicesneuromorphic computingresistive switchingoxide nanomaterialsnonvolatile memory

Research Overview

Papers
239
Total Citations
3,036
Papers (5y)
35
Primary Field
Engineering

Research Output Trend

Figures are computed from collected data and may differ slightly.

Publications per year (5y)
35total
2022
2023
2024
2025
2026
Citations per year (5y)
270total
20222023202420252026

Selected Papers

15
1
Article|70 citations·2013
Digital versus analog resistive switching depending on the thickness of nickel oxide nanoparticle assembly
Hyung Jun Kim, Yoon-Jae Baek, Young Jin Choi, Chi Jung Kang, Hyun Ho Lee, Hyun-Mi Kim, Ki‐Bum Kim, Tae‐Sik Yoon
SJR Q1RSC Advances

The thickness-dependent digital versus analog resistive switching of nickel oxide (NiOx) nanoparticle assemblies was investigated in a Ti/NiOx/Pt structure. The NiOx nanoparticles were chemically synthesized with ∼5 nm diameter. The Ti/NiOx/Pt structure with assembly thickness of ∼60 nm exhibited the digital-type bipolar resistive switching. However, the assembly with a thickness of ∼90 nm presented analog resistive switching with gradually decreasing resistance when sweeping −V while increasing

Electrical and Electronic EngineeringEngineering
2
Article|45 citations·2018
Analog reversible nonvolatile memcapacitance in metal-oxide-semiconductor memcapacitor with ITO/HfOx/Si structure
Daehoon Park, Paul Yang, Hyung Jun Kim, Keonwon Beom, Hyun Ho Lee, Chi Jung Kang, Tae‐Sik Yoon
SJR Q1Applied Physics Letters

We demonstrate strong, analog, reversible, and nonvolatile memcapacitance in a Si-based MOS (metal-oxide-semiconductor) memcapacitor with an ITO (In-Sn-O)/HfOx/Si structure. Both accumulation and depletion capacitances change sequentially and reversibly upon repeating voltage application with respect to voltage polarity. This memcapacitance is thought to be induced by oxygen ions' migration between ITO and HfOx layers, which changes the HfOx permittivity and the depletion states in Si and ITO. T

Electrical and Electronic EngineeringEngineering
3
Article|44 citations·2023
Linear and symmetric synaptic weight update characteristics by controlling filament geometry in oxide/suboxide HfOx bilayer memristive device for neuromorphic computing
Dwipak Prasad Sahu, Kitae Park, Peter Hayoung Chung, Jimin Han, Tae‐Sik Yoon
SJR Q1Scientific ReportsOA

Abstract Memristive devices have been explored as electronic synaptic devices to mimic biological synapses for developing hardware-based neuromorphic computing systems. However, typical oxide memristive devices suffered from abrupt switching between high and low resistance states, which limits access to achieve various conductance states for analog synaptic devices. Here, we proposed an oxide/suboxide hafnium oxide bilayer memristive device by altering oxygen stoichiometry to demonstrate analog

Electrical and Electronic EngineeringEngineering
4
Article|43 citations·2017
Artificial synaptic characteristics with strong analog memristive switching in a Pt/CeO2/Pt structure
Hyung Jun Kim, Hong Zheng, Jong‐Sung Park, Dong Hun Kim, Chi Jung Kang, Jun Tae Jang, Dae Hwan Kim, Tae‐Sik Yoon
SJR Q2Nanotechnology

Artificial synaptic potentiation and depression characteristics were demonstrated with Pt/CeO<sub>2</sub>/Pt devices exhibiting polarity-dependent analog memristive switching. The strong and sequential resistance change with its maximum to minimum ratio >10<sup>5</sup>, imperatively essential for stable operation, as repeating voltage application, emulated the potentiation and depression motion of a synapse with variable synaptic weight. The synaptic weight change could be controlled by the ampl

Electrical and Electronic EngineeringEngineering
5
Article|37 citations·2012
Tunable threshold resistive switching characteristics of Pt–Fe2O3core–shell nanoparticleassembly by space charge effect
Yoon-Jae Baek, Quanli Hu, Jae Woo Yoo, Young Jin Choi, Chi Jung Kang, Hyun Ho Lee, Seok‐Hong Min, Hyun-Mi Kim, Ki‐Bum Kim, Tae‐Sik Yoon
SJR Q1Nanoscale

Tunable threshold resistive switching characteristics of Pt-Fe(2)O(3) core-shell nanoparticle (NP) assembly were investigated. The colloidal Pt-Fe(2)O(3) core-shell NPs with a Pt core diameter of ∼3 nm and a total diameter of ∼15 nm were chemically synthesized by a one-step process. These NPs were assembled as a layer with a thickness of ∼80 nm by repeated dip-coating between Ti and Pt electrodes on a flexible polyethersulfone (PES) substrate. The Ti/NPs/Pt/PES structure exhibited the threshold

Electrical and Electronic EngineeringEngineering
6
Article|37 citations·2004
Single and Multiple‐Step Dip‐Coating of Colloidal Maghemite (γ‐Fe2O3) Nanoparticles onto Si, Si3N4, and SiO2 Substrates
Tae‐Sik Yoon, Jihun Oh, Sung‐Hee Park, Vyacheslav V. Kim, Byung-Doo Jung, Seok Hong Min, Jongnam Park, Taeghwan Hyeon, K.‐B. Kim
SJR Q1Advanced Functional Materials

Abstract The adsorption behavior of colloidal maghemite (γ‐Fe 2 O 3 ) nanoparticles, passivated by oleic acid and dispersed in octane solution, onto three different substrates (Si, Si 3 N 4 , and SiO 2 ) is investigated. The average nanoparticle size is 10 nm, with a size variation (σ) less than 5 %. The adsorption of particles is strongly dependent on both the type of substrate and the particle concentration in solution. By a single‐dipping process, we have obtained a maximum coverage of 0.45 o

Renewable Energy, Sustainability and the EnvironmentEnergy
7
Article|36 citations·2019
A Pt/ITO/CeO2/Pt memristor with an analog, linear, symmetric, and long-term stable synaptic weight modulation
Hyung Jun Kim, Minju Kim, Keonwon Beom, Hyerin Lee, Chi Jung Kang, Tae‐Sik Yoon
SJR Q1APL MaterialsOA

Analog synaptic weight modulation that is linear, symmetric, and exhibits long-term stability is demonstrated by the resistance changes in a Pt/indium-tin-oxide (ITO)/CeO2/Pt memristor. Distinct from a Pt/CeO2/Pt memristor without the ITO layer, which shows highly nonlinear and asymmetric resistance changes, the Pt/ITO/CeO2/Pt memristor exhibits linear and symmetric resistance changes in proportion to the number of voltage applications with opposite polarities for potentiation and depression beh

Electrical and Electronic EngineeringEngineering
8
Article|29 citations·2024
Forming-Free, Low-Voltage, and High-Speed Resistive Switching in Ag/Oxygen-Deficient Vanadium Oxide(VOx)/Pt Device through Two-Step Resistance Change by Ag Filament Formation
Jiyeon Ryu, Kitae Park, Dwipak Prasad Sahu, Tae‐Sik Yoon
SJR Q1ACS Applied Materials & Interfaces

Forming-free, low-voltage, and high-speed resistive switching is demonstrated in an Ag/oxygen-deficient vanadium oxide (VO x )/Pt device via the facilitated formation and rupture of Ag filaments. Direct current (DC) voltage sweep measurements exhibit forming-free switching from a high-resistance state (HRS) to a low-resistance state (LRS), called SET, at an average V SET of +0.23 V. The reverse RESET transition occurs at an average V RESET of −0.07 V with a low RESET current of <1 mA. Reversible

Electrical and Electronic EngineeringEngineering
9
Article|29 citations·2018
Single- and double-gate synaptic transistor with TaO x gate insulator and IGZO channel layer
Keonwon Beom, Paul Yang, Daehoon Park, Hyung Jun Kim, Hyun Ho Lee, Chi Jung Kang, Tae‐Sik Yoon
SJR Q2Nanotechnology

Abstract We demonstrate single- and double-gate synaptic operations of a thin-film transistor (TFT) with double-gate stack consisting of an Al-top-gate/SiO x /TaO x /n-IGZO on a SiO 2 /n + -Si-bottom-gate substrate. This synaptic TFT exhibits a tunable drain current, mimicking synaptic weight modulation in the biological synapse, upon repeatedly applying gate and drain voltages. The drain current modulation features are analog, voltage-polarity dependently reversible, and strong with a dynamic r

Electrical and Electronic EngineeringEngineering
10
Article|27 citations·2017
Synaptic transistor with a reversible and analog conductance modulation using a Pt/HfOx/n-IGZO memcapacitor
Paul Yang, Hyung Jun Kim, Hong Zheng, Geon Won Beom, Jong‐Sung Park, Chi Jung Kang, Tae‐Sik Yoon
SJR Q2Nanotechnology

A synaptic transistor emulating the biological synaptic motion is demonstrated using the memcapacitance characteristics in a Pt/HfOx/n-indium-gallium-zinc-oxide (IGZO) memcapacitor. First, the metal-oxide-semiconductor (MOS) capacitor with Pt/HfOx/n-IGZO structure exhibits analog, polarity-dependent, and reversible memcapacitance in capacitance-voltage (C-V), capacitance-time (C-t), and voltage-pulse measurements. When a positive voltage is applied repeatedly to the Pt electrode, the accumulatio

Electrical and Electronic EngineeringEngineering
11
Article|25 citations·2020
Nonvolatile Memory and Artificial Synaptic Characteristics in Thin‐Film Transistors with Atomic Layer Deposited HfOx Gate Insulator and ZnO Channel Layer
Hyerin Lee, Keonwon Beom, Minju Kim, Chi Jung Kang, Tae‐Sik Yoon
SJR Q1Advanced Electronic Materials

Abstract Nonvolatile memory and synaptic characteristics in thin‐film transistors (TFTs) with HfOx gate insulator and ZnO channel are investigated for the application to nonvolatile memory and artificial synapse in neuromorphic systems. Nonvolatile change of drain current induced by modulated gate stack properties is demonstrated to be applicable to nonvolatile memory operation. It also emulates synaptic weight change for learning and memory functions in artificial synapses. The TFTs with HfOx a

Electrical and Electronic EngineeringEngineering
12
Article|23 citations·2006
Selective growth of Ge islands on nanometer-scale patterned SiO2∕Si substrate by molecular beam epitaxy
Tae‐Sik Yoon, Zuoming Zhao, Jian Liu, Ya-Hong Xie, Du Yeol Ryu, Thomas P. Russell, Hyun-Mi Kim, Ki-Bum Kim
SJR Q1Applied Physics Letters

The authors studied the selective growth of Ge islands by molecular beam epitaxy on Si(001) covered with nanometer-scale patterned SiO2 mask generated using self-assembled diblock copolymer. Selective growth is made possible by Ge adatoms desorbing from the SiO2 surface as well as diffusing into the exposed Si area. For the Ge coverage of 2nm, multiple islands are observed along the periphery of individual exposed Si areas. At 3.5nm coverage, the coalescence of small islands with significant str

Electrical and Electronic EngineeringEngineering
13
Article|21 citations·2019
Reversible capacitance changes in the MOS capacitor with an ITO/CeO2/p-Si structure
Daehoon Park, Minju Kim, Keonwon Beom, Seong‐Yong Cho, Chi Jung Kang, Tae‐Sik Yoon
SJR Q1Journal of Alloys and Compounds
Electrical and Electronic EngineeringEngineering
14
Article|20 citations·2022
Improvement of forming-free threshold switching reliability of CeO2-based selector device by controlling volatile filament formation behaviors
Dwipak Prasad Sahu, Kitae Park, Jimin Han, Tae‐Sik Yoon
SJR Q1APL MaterialsOA

Diffusive memristor-based threshold switching devices are promising candidates for selectors in the crossbar memory architecture. However, the reliability and uniformity of the devices are primary concerns due to uncontrolled diffusion of metal ions in the solid electrolyte of diffusive memristors. In this study, CeO2-based selectors with Ag electrodes were demonstrated to have forming-free threshold switching characteristics. In particular, by inserting an amorphous SiO2 layer in a CeO2-based s

Electrical and Electronic EngineeringEngineering
15
Article|20 citations·2005
Surface roughness and dislocation distribution in compositionally graded relaxed SiGe buffer layer with inserted-strained Si layers
Tae‐Sik Yoon, Jian Liu, Atif Noori, Mark S. Goorsky, Ya‐Hong Xie
SJR Q1Applied Physics Letters

We investigate the surface roughness and dislocation distribution of compositionally graded relaxed SiGe buffer layers by inserting two tensile-strained Si layers. The 20nm thick strained Si layers, less than the critical thickness for dislocation formation, are inserted at 10 and 20% Ge content regions of the 1μm thick graded SiGe layer with a final Ge content of 30%. The surface immediately after growing the second strained Si layer on SiGe with 20% Ge content is found to be flat with about 1.

Atomic and Molecular Physics, and OpticsPhysics and Astronomy

Research Areas

Electrical and Electronic EngineeringMaterials ChemistryMechanical EngineeringAtomic and Molecular Physics, and OpticsPolymers and PlasticsBiomedical Engineering

Dive deeper into Tae‐Sik Yoon's research on Nubint

Open this lab's papers in the app to read with AI, summarize, and cite in your writing.