[论文解读] Deja Vu: Contextual Sparsity for Efficient LLMs at Inference Time

Zichang Liu, Jue Wang+9 more|arXiv (Cornell University)|Oct 26, 2023

Topic Modeling被引用 19

一句话总结

Introduces contextual sparsity for LLMs to speed up inference by predicting small, input-dependent subsets of attention heads and MLP neurons, enabling wall-clock time speedups without retraining or sacrificing in-context learning.

ABSTRACT

Large language models (LLMs) with hundreds of billions of parameters have sparked a new wave of exciting AI applications. However, they are computationally expensive at inference time. Sparsity is a natural approach to reduce this cost, but existing methods either require costly retraining, have to forgo LLM's in-context learning ability, or do not yield wall-clock time speedup on modern hardware. We hypothesize that contextual sparsity, which are small, input-dependent sets of attention heads and MLP parameters that yield approximately the same output as the dense model for a given input, can address these issues. We show that contextual sparsity exists, that it can be accurately predicted, and that we can exploit it to speed up LLM inference in wall-clock time without compromising LLM's quality or in-context learning ability. Based on these insights, we propose DejaVu, a system that uses a low-cost algorithm to predict contextual sparsity on the fly given inputs to each layer, along with an asynchronous and hardware-aware implementation that speeds up LLM inference. We validate that DejaVu can reduce the inference latency of OPT-175B by over 2X compared to the state-of-the-art FasterTransformer, and over 6X compared to the widely used Hugging Face implementation, without compromising model quality. The code is available at https://github.com/FMInference/DejaVu.

研究动机与目标

• Motivate and demonstrate that contextual sparsity exists in pre-trained LLMs and can be exploited for inference-time speedups.
• Develop a low-cost predictor to identify context-dependent sparse subsets per layer on the fly.
• Propose an asynchronous, hardware-aware implementation to reduce end-to-end latency.
• Validate speedups and accuracy preservation on OPT-175B across multiple benchmarks.

提出的方法

• Define sparsified MLP and MHA blocks under contextual sparsity.
• Show that contextual sparsity can reach ~85% structured sparsity per input, enabling up to 7x parameter reduction per input.
• Develop a two-stage sparsity predictor (for MLP and for attention) trained to identify important neurons/heads based on input.
• Formulate MLP sparsity as a near-neighbor search problem (MaxIP) and implement a fast neural predictor to select relevant neurons.
• Similarly formulate attention head sparsity as a near-neighbor search, predicting which heads to use per input.
• Introduce an asynchronous lookahead predictor to hide prediction overhead and maintain end-to-end latency gains.
• Provide hardware-aware kernel fusion and memory-coalescing strategies to realize speedups on GPUs.

实验结果

研究问题

• RQ1 Does contextual sparsity exist in pre-trained LLMs for practical inputs?
• RQ2 Can we predict contextual sparsity accurately on the fly without retraining?
• RQ3 Can end-to-end latency be meaningfully reduced on modern hardware while preserving model quality and in-context learning?
• RQ4 What are effective hardware-aware implementations to realize speedups from contextual sparsity?
• RQ5 How does the proposed approach interact with residual connections and slow-changing embeddings across layers?

主要发现

• Contextual sparsity exists in pre-trained LLMs, with up to ~85% of parameters being contextually inactive for a given input.
• Predictors based on input and layer context can accurately identify sparse subsets for MLP and attention blocks.
• End-to-end latency is reduced by over 2x compared to FasterTransformer and over 6x compared to Hugging Face for OPT-175B, with no quality loss.
• The approach preserves in-context learning abilities and maintains zero-shot/few-shot performance on evaluated tasks.
• An asynchronous lookahead predictor and hardware-aware implementation are key to achieving wall-clock speedups in practice.