[Paper Review] Full-Stack, Real-System Quantum Computer Studies: Architectural Comparisons and Design Insights

Prakash Murali, Norbert M. Linke+4 more|arXiv (Cornell University)|May 27, 2019

Quantum Computing Algorithms and Architecture50 references38 citations

TL;DR

This paper presents TriQ, a cross-platform, noise-aware quantum compiler, and evaluates it on seven real-system prototypes across superconducting and trapped-ion technologies to compare architectures and show performance gains over vendor tools.

ABSTRACT

In recent years, Quantum Computing (QC) has progressed to the point where small working prototypes are available for use. Termed Noisy Intermediate-Scale Quantum (NISQ) computers, these prototypes are too small for large benchmarks or even for Quantum Error Correction, but they do have sufficient resources to run small benchmarks, particularly if compiled with optimizations to make use of scarce qubits and limited operation counts and coherence times. QC has not yet, however, settled on a particular preferred device implementation technology, and indeed different NISQ prototypes implement qubits with very different physical approaches and therefore widely-varying device and machine characteristics. Our work performs a full-stack, benchmark-driven hardware-software analysis of QC systems. We evaluate QC architectural possibilities, software-visible gates, and software optimizations to tackle fundamental design questions about gate set choices, communication topology, the factors affecting benchmark performance and compiler optimizations. In order to answer key cross-technology and cross-platform design questions, our work has built the first top-to-bottom toolflow to target different qubit device technologies, including superconducting and trapped ion qubits which are the current QC front-runners. We use our toolflow, TriQ, to conduct {\em real-system} measurements on 7 running QC prototypes from 3 different groups, IBM, Rigetti, and University of Maryland. From these real-system experiences at QC's hardware-software interface, we make observations about native and software-visible gates for different QC technologies, communication topologies, and the value of noise-aware compilation even on lower-noise platforms. This is the largest cross-platform real-system QC study performed thus far; its results have the potential to inform both QC device and compiler design going forward.

Motivation & Objective

• Benchmark cross-technology QC architectures (superconducting vs. trapped ions) to identify hardware-software design implications.
• Develop a full-stack, multi-platform compiler (TriQ) that maps high-level QC programs to real devices with device-specific optimizations.
• Assess the impact of native vs software-visible gates and connectivity on compilation quality and program success rates.
• Provide actionable recommendations for gate sets, topology, and noise-aware compilation in NISQ systems.

Proposed method

• Build TriQ, a multi-target QC compiler that accepts Scaffold programs and device characteristics as inputs and outputs vendor-specific executable code.
• Create a noise-aware reliability matrix for 2Q operations based on topology and calibration data; use Floyd-Warshall for reliable routing paths.
• Map program qubits to hardware qubits by maximizing a minimum reliability objective via an SMT solver.
• Schedule gates topologically honoring dependencies and insert optimized SWAP paths when needed.
• Decompose and optimize gates to native or software-visible gate sets per vendor; optimize single-qubit sequences using quaternion representations.
• Generate executables in OpenQASM, Quil, or device-specific assembly for seven real QC platforms.

Experimental results

Research questions

• RQ1 How do device topology, native gate sets, and noise profiles affect software performance and reliability across QC technologies?
• RQ2 Can a single cross-platform toolflow (TriQ) achieve portability without sacrificing performance compared to vendor compilers?
• RQ3 What architectural insights emerge regarding the value of software-visible vs native gates and connectivity for NISQ devices?
• RQ4 To what extent can noise-aware compilation improve program success rates across superconducting and trapped-ion systems?

Key findings

• TriQ achieves up to 28x improvement in program success rate on IBM devices (geomean 3x) over IBM Qiskit, and up to 2.3x on Rigetti (geomean 1.45x).
• TriQ improves UMDTI trapped-ion results by up to 1.47x versus a noise-unaware baseline.
• Exposing device-specific gates enables significant compile-time and run-time optimizations, outperforming vendor toolflows.
• Noise-aware compilation and optimized qubit communication yield meaningful gains even on lower-noise platforms.
• TriQ scales well up to 72 qubits, aligning with the largest announced NISQ configurations.
• The study provides cross-vendor, cross-technology insights for gate selection, topology, and compiler design.