Hanyang University · Engineering
Professor Daewoong Kwon's research lab specializes in advanced semiconductor devices for next-generation computing, with a primary focus on ferroelectric and antiferroelectric materials for neuromorphic and low-power electronics. The lab investigates novel ferroelectric field-effect transistors (FeFETs), ferroelectric tunnel junctions (FTJs), and high-performance thin-film transistors (TFTs) to enable energy-efficient, high-speed synaptic devices for artificial intelligence hardware. Key research directions include understanding and mitigating low-frequency noise and interface trap variability, optimizing HfZrO₂-based mixed-phase ferroelectrics for steep subthreshold swing and non-hysteretic operation, and developing gate-all-around nanosheet structures for scalable neuromorphic systems.
Figures are computed from collected data and may differ slightly.
With the recently increasing prevalence of deep learning, both academia and industry exhibit substantial interest in neuromorphic computing, which mimics the functional and structural features of the human brain. To realize neuromorphic computing, an energy-efficient and reliable artificial synapse must be developed. In this study, the synaptic ferroelectric field-effect-transistor (FeFET) array is fabricated as a component of a neuromorphic convolutional neural network. Beyond the single transi
In recent years, neuromorphic computing has been rapidly developed to overcome the limitations of von Neumann architecture. In this regard, the demand for high‐performance synaptic devices with high switching speeds, low power consumption, and multilevel conductance is increasing. Among the various synaptic devices, ferroelectric tunnel junctions (FTJs) are promising candidates. While previous studies have focused on improving reliability of FTJs to enhance the synaptic behavior, low‐frequency n
A ferroelectric thin‐film transistor (FeTFT)‐based synaptic device with an indium–gallium–zinc oxide (IGZO) channel and a metal–ferroelectric–metal–insulator–semiconductor (MFMIS) structure is reported. The fabricated FeTFT exhibits a highly linear conductance response (| α | = 0.21) with a large dynamic range ( G max / G min ≈ 53.2), although identical program pulses are applied to the device. In addition, because the inner metal layer of the FeTFTs has an MFMIS structure, the electric field is
We investigate the variability of a ferroelectric FET (FEFET) in program operation using low-frequency noise (LFN) spectroscopy. Contrary to the previous report, LFN characteristics of FEFETs differ significantly depending on the program [low threshold voltage (Vth)] or erase state [high Vth)] [Shin et al., IEEE Electron Device Lett. 43, 13 (2022)]. Furthermore, the 1/f noise variation of the FEFETs is much larger in the program state than that in the erase state. It is revealed that the change
A material design method is proposed using ferroelectric (FE)-antiferroelectric (AFE) mixed-phase HfZrO<sub>2</sub> (HZO) to achieve performance improvements in morphotropic phase boundary (MPB) field-effect transistors (MPB-FETs), such as steep subthreshold swing (SS) and non-hysteretic on-current (I<sub>on</sub>) enhancement. Capacitance (small-signal and quasi-static) and transient current measurements of MPB-FETs confirmed that near-threshold voltage (V<sub>TH</sub>) capacitance amplificatio
ABSTRACT In this work, the polarization‐dependent operating characteristics of TiN/Hf x Zr 1‐x O 2 (HZO)/SiO 2 /Si ferroelectric FETs (FeFETs) are investigated, and remote HZO/SiO 2 interface traps ( D it,FE/DE ) are quantitatively separated from Si/SiO 2 interface traps ( D it0 ). X‐ray photoelectron spectroscopy (XPS) reveals an oxygen‐vacancy ( V O )‐rich HfSiO x layer at the HZO/SiO 2 interface. Based on the transistor operation theory and trap/polarization‐switching charge distribution, the
Open papers in the app to read, cite, and organize with AI.
