Kyung Hee University · Engineering
Professor Sung-Min Yoon's research lab specializes in advanced oxide semiconductor materials and thin-film transistor (TFT) technologies, with a strong focus on transparent, flexible, and non-volatile memory devices. The lab explores novel ferroelectric and phase-change materials—such as Sb65Se35, Al:HfO2, and IGZO—engineered via atomic layer deposition for next-generation electronic applications. Key research directions include synaptic transistor devices for neuromorphic computing, high-performance and stable TFTs with low-temperature processes, and the development of transparent and flexible electronics for wearable and portable systems.
Figures are computed from collected data and may differ slightly.
A phase-change material of Sb/sub 65/Se/sub 35/ was newly proposed for the nonvolatile memory applications. The fabricated phase-change memory device using Sb/sub 65/Se/sub 35/ showed a good electrical threshold switching characteristic in the dc current-voltage (I-V) measurement. The programming time for set operation of the memory device decreased from 1 μs to 250 ns when Sb/sub 65/Se/sub 35/ was introduced in place of the conventionally employed Ge <sub xmlns:mml="http://www.w3.org/1998/Math/
Abstract A fully transparent non‐volatile memory thin‐film transistor (T‐MTFT) is demonstrated. The gate stack is composed of organic ferroelectric poly(vinylidene fluoride‐trifluoroethylene) [P(VDF‐TrFE)] and oxide semiconducting Al‐Zn‐Sn‐O (AZTO) layers, in which thin Al 2 O 3 is introduced between two layers. All the fabrication processes are performed below 200 °C on the glass substrate. The transmittance of the fabricated device was more than 90% at the wavelength of 550 nm. The memory wind
We demonstrated the physical and electrical properties of the In-Ga-Zn-O (IGZO) thin films prepared by atomic-layer deposition (ALD) method and investigated the effects of the ALD temperature. The film composition (atomic ratio of In:Ga:Zn) and film density were examined to be 1:1:3 and 5.9 g/cm<sup>3</sup>, respectively, for all the temperature conditions. The optical band gaps decreased from 3.81 to 3.21 eV when the ALD temperature increased from 130 to 170 °C. The amounts of oxygen-related de
Bias temperature stress stabilities of thin-film transistors (TFTs) using In-Ga-Zn-O (IGZO) channels prepared by the atomic layer deposition process were investigated with varying channel thicknesses (10 and 6 nm). Even when the IGZO channel thickness was reduced to 6 nm, the device exhibited good characteristics with a high saturation mobility of 15.1 cm<sup>2</sup> V<sup>-1</sup> s<sup>-1</sup> and low sub-threshold swing of 0.12 V dec<sup>-1</sup>. Excellent positive and negative bias stress
Human brain-like synaptic behaviors of the ferroelectric field-effect transistors (FeFETs) were emulated by introducing the metal-ferroelectric-metal-insulator-semiconductor (MFMIS) gate stacks employing Al-doped HfO2 (Al:HfO2) ferroelectric thin films even at a low operation voltage. The synaptic plasticity of the MFMIS-FETs could be gradually modulated by the partial polarization characteristics of the Al:HfO2 thin films, which were examined to be dependent on the applied pulse conditions. Bas
Bending characteristics of flexible oxide thin-film transistors could be enhanced by optimizing the barrier layers on the polyethylene naphthalate substrate.
Organic–inorganic hybrid-type nonvolatile memory thin-film transistors using an organic ferroelectric gate insulator and an oxide semiconducting active channel are a very promising solution to the memory devices having both features of low-cost and high-performance, which are embeddable into the next-generation flexible and transparent electronics. In this paper, we discuss some important issues for this proposed device, such as device structure design, process optimization and memory array inte
A novel FET-type ferroelectric memory cell with one-transistor, and two-capacitor (1T2C) structure was fabricated and characterized, in which the generation of depolarization field in ferroelectric film during data retention was suppressed by polarizing two ferroelectric capacitors in opposite directions. It was demonstrated that the stored data were nondestructively read-out and their retention time was much longer than that of conventional ferroelectric-gate FET.
Mechanically flexible vertical-channel-structured thin-film transistors (VTFTs) with a channel length of 200 nm were fabricated on 1.2 μm thick colorless polyimide (CPI) substrates. All layers composing the gate stacks were prepared by atomic-layer deposition (ALD) with a good step coverage, and the process thermal budget was designed below 180 °C. Zeocoat was introduced as a spacer material to improve the device characteristics by properly determining the process conditions for clearly forming
Ferroelectric Hf0.5Zr0.5O2 (HZO) thin film capacitors with Pt/HZO/TiN structures were characterized to investigate the effects of oxygen partial pressure (PO2) and film thickness on the ferroelectric properties and switching dynamics of sputter-deposited HZO thin films. The PO2 during deposition and the film thickness varied from 0% to 1.5% and from 20 to 30 nm, respectively. The ferroelectric remnant polarization (2Pr) was 24.8 μC/cm2 for the 20-nm-thick HZO thin film deposited at a PO2 of 0% a
We characterized the nonvolatile memory thin-film transistors, which was composed of an amorphous indium-gallium-zinc oxide (α-IGZO) active channel and a ferroelectric poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] gate insulator, and investigated the impact of an interface controlling layer. Excellent device performances, such as the field-effect mobility of 60.9 cm2 V−1 s−1, the subthreshold swing of 120 mV/dec, and the memory window of 6.4 V at ±12 V programming, were confirmed for
Poly(vinylidene fluoride trifluoroethylene) and ZnO were employed for nonvolatile memory thin film transistors as ferroelectric gate insulator and oxide semiconducting channel layers, respectively. It was proposed that the thickness of the ZnO layer be carefully controlled for realizing the lower programming voltage, because the serially connected capacitor by the formation of a fully depleted ZnO channel had a critical effect on the off programming voltage. The fabricated memory transistor with
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