[论文解读] Coded Caching Schemes with Low Rate and Subpacketizations

Minquan Cheng, Qifa Yan+2 more|arXiv (Cornell University)|Mar 5, 2017

Caching and Content Delivery参考文献 22被引用 32

一句话总结

本文提出了两类新的Pareto最优放置传输数组（PDAs），用于有码缓存系统，在推导出关于速率的新下界并利用组合设计的基础上，实现了低速率和低分段化。与现有构造（包括开创性的MN方案及其他基于PDA的方法）相比，该方案在各种系统参数下显著降低了传输速率和文件分段复杂度。

ABSTRACT

Coded caching scheme, which is an effective technique to increase the transmission efficiency during peak traffic times, has recently become quite popular among the coding community. Generally rate can be measured to the transmission in the peak traffic times, i.e., this efficiency increases with the decreasing of rate. In order to implement a coded caching scheme, each file in the library must be split in a certain number of packets. And this number directly reflects the complexity of a coded caching scheme, i.e., the complexity increases with the increasing of the packet number. However there exists a tradeoff between the rate and packet number. So it is meaningful to characterize this tradeoff and design the related Pareto-optimal coded caching schemes with respect to both parameters. Recently, a new concept called placement delivery array (PDA) was proposed to characterize the coded caching scheme. However as far as we know no one has yet proved that one of the previously known PDAs is Pareto-optimal. In this paper, we first derive two lower bounds on the rate under the framework of PDA. Consequently, the PDA proposed by Maddah-Ali and Niesen is Pareto-optimal, and a tradeoff between rate and packet number is obtained for some parameters. Then, from the above observations and the view point of combinatorial design, two new classes of Pareto-optimal PDAs are obtained. Based on these PDAs, the schemes with low rate and packet number are obtained. Finally the performance of some previously known PDAs are estimated by comparing with these two classes of schemes.

研究动机与目标

• 为解决有码缓存系统中传输速率与分段化之间的权衡问题，这对实际部署至关重要。
• 在PDA框架下建立速率的理论下界，以评估现有方案的最优性。
• 构建新的PDAs类别，通过同时最小化速率和分段化实现Pareto最优性。
• 评估并比较已知有码缓存方案与所提最优构造的性能。

提出的方法

• 在PDA框架下推导出关于有码缓存方案速率R的两个新下界，实现对最优性的理论评估。
• 通过一种新颖的三维向量表示法表征PDAs，实现新PDA族的系统化构造。
• 基于组合设计和推导出的下界，构造两类新的PDAs，确保Pareto最优性。
• 利用新PDAs生成具有低速率和低分段化的有码缓存方案，优于现有构造。
• 通过数值评估速率和分段化，对比已知方案（如MN及其他PDAs）与所提构造的性能。
• 利用不等式和渐近分析证明，在特定参数范围内，新PDAs类别在F和R方面优于现有方案。

实验结果

研究问题

• RQ1 Maddah-Ali与Niesen（MN）PDA在速率与分段化权衡下是否为Pareto最优？
• RQ2 能否构造出能同时最小化有码缓存系统速率与分段化的新型PDAs类别？
• RQ3 在PDA框架下，给定分段化F时，速率R的理论下界是什么？
• RQ4 已知方案的性能指标（速率R与分段化F）与所提Pareto最优构造相比如何？
• RQ5 在何种参数条件下，新PDAs构造在速率与分段化方面均优于现有方案？

主要发现

• 证明了MN PDA在PDA框架下为Pareto最优，确认其在速率与分段化权衡中的最优性。
• 通过三维向量表征和组合设计，构造出两类新的Pareto最优PDAs，所得方案显著降低了F与R。
• 当K ≥ 47且M/N ≤ 0.99时，所提PDA类（定理8-(c)）相比引理3中的PDA，实现了F/F₄ < 1且R/R₄ < 1，证明性能更优。
• 在特定K、M/N和N值下，与已知方案相比，所提构造将分段化F降低高达97%，速率R降低高达12%。
• 性能比较表明，当K ≥ 47且某些M/N比例下，引理3中的PDA并非Pareto最优，因为新构造在F与R方面均占优。
• 理论分析确认，当k > 46.352时，新PDA类在相同系统参数下始终优于引理3中的PDA，实现更低的F与R。