[论文解读] Modelling semiconductor spin qubits and their charge noise environment for quantum gate fidelity estimation
本文提出了一种协同建模框架,结合静电势求解器、全配置相互作用(FCI)量子力学以及两级跃迁器(TLF)模型,用于模拟硅双量子点(DQD)自旋量子比特中的电荷噪声效应。结果表明,更高的量子点约束频率可提升门保真度,在10¹¹ cm⁻² TLF密度下,X门保真度可超过97%;而SWAP门由于对电荷噪声更敏感,保真度较低(约91%)。
The spin of an electron confined in semiconductor quantum dots is currently a promising candidate for quantum bit (qubit) implementations. Taking advantage of existing CMOS integration technologies, such devices can offer a platform for large scale quantum computation. However, a quantum mechanical framework bridging a device's physical design and operational parameters to the qubit energy space is lacking. Furthermore, the spin to charge coupling introduced by intrinsic or induced Spin-Orbit-Interaction (SOI) exposes the qubits to charge noise compromising their coherence properties and inducing quantum gate errors. We present here a co-modelling framework for double quantum dot (DQD) devices and their charge noise environment. We use a combination of an electrostatic potential solver, full configuration interaction quantum mechanical methods and two-level-fluctuator models to study the quantum gate performance in realistic device designs and operation conditions. We utilize the developed models together alongside the single electron solutions of the quantum dots to simulate one- and two- qubit gates in the presence of charge noise. We find an inverse correlation between quantum gate errors and quantum dot confinement frequencies. We calculate X-gate fidelities >97% in the simulated Si-MOS devices at a typical TLF densities. We also find that exchange driven two-qubit SWAP gates show higher sensitivity to charge noise with fidelities down to 91% in the presence of the same density of TLFs. We further investigate the one- and two- qubit gate fidelities at different TLF densities. We find that given the small size of the quantum dots, sensitivity of a quantum gate to the distance between the noise sources and the quantum dot creates a strong variability in the quantum gate fidelities which can compromise the device yields in scaled qubit technologies.
研究动机与目标
- 开发一种量子力学建模框架,弥合半导体自旋量子比特器件设计与量子比特操作之间的鸿沟。
- 量化通过两级跃迁器(TLF)建模的电荷噪声对真实硅双量子点(DQD)器件中单量子比特与双量子比特门保真度的影响。
- 研究静电噪声功率谱密度与量子门保真度下降之间的关联,同时考虑噪声源的空间非均匀性。
- 评估门保真度对TLF密度及噪声源与量子点之间距离的依赖性,以应对可扩展量子比特架构中的良率挑战。
提出的方法
- 采用二维静电势求解器,基于实际器件几何结构计算硅-MOS双量子点中的真实约束势。
- 应用全配置相互作用(FCI)方法求解多体薛定谔方程,计算交换相互作用与量子比特能级。
- 通过随机空间分布的两级跃迁器(TLF)模拟微观电荷涨落,对电荷噪声进行建模。
- 通过TLF产生的电场贡献计算量子比特频率偏移,从而估算对量子比特有效拉比频率的噪声功率谱密度。
- 基于仅在门操作之间切换的TLF假设,采用解析保真度模型,计算作为频率噪声功率谱密度函数的平均X门保真度。
- 对100组随机TLF分布进行统计分析,以评估门保真度的波动性并提取相关趋势。
实验结果
研究问题
- RQ1在存在电荷噪声的情况下,量子点的约束频率如何影响单量子比特门保真度?
- RQ2在典型Si-MOS DQD器件中,TLF密度(如10¹¹ cm⁻²)对X门与SWAP门保真度有何影响?
- RQ3TLF相对于量子点的空间分布如何影响门保真度的波动性与相干性?
- RQ4在自旋量子比特中,静电噪声功率谱密度与量子比特频率噪声功率谱密度之间是否存在单调关系?
- RQ5TLF与量子点之间的距离在多大程度上调节门保真度?这对可扩展量子计算平台的良率有何影响?
主要发现
- 量子门保真度与电荷噪声之间存在反比关系,更高的量子点约束频率可带来更优的门性能。
- 在典型TLF密度10¹¹ cm⁻²下,模拟的Si-MOS器件中X门保真度超过97%,表明在最优约束条件下对电荷噪声具有高度鲁棒性。
- 由交换相互作用驱动的SWAP门对电荷噪声更敏感,相同TLF密度下保真度下降至约91%。
- 量子比特频率噪声功率谱密度(NQ)与静电势噪声(N)之间存在单调且线性关系,消除了电场效应引起的三阶非线性波动。
- 在1 Hz处,量子比特频率噪声功率谱密度与X门保真度下降之间观察到幂律相关性(R² = 0.433),不同TLF构型下存在显著波动。
- 噪声影响的强空间依赖性——尤其是距离相关的耦合——导致门保真度波动显著,对可扩展量子计算平台的良率构成挑战。
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