[论文解读] OpenHEC: A Framework for Application Programmers to Design FPGA-based Systems

Zhilei Chai, Zhibin Wang+3 more|arXiv (Cornell University)|Aug 21, 2014

Parallel Computing and Optimization Techniques参考文献 12被引用 4

一句话总结

OpenHEC 是一个高级框架，使应用开发人员即使硬件知识极少，也能通过抽象低层硬件细节来设计基于 FPGA 的系统。与 Xilinx ISE/Vivado 集成后，可直接实现算法——以特征检测算法为例，展示了无需 FPGA 或硬件架构知识即可获得易用性和性能提升。

ABSTRACT

Today, there is a trend to incorporate more intelligence (e.g., vision capabilities) into a wide range of devices, which makes high performance a necessity for computing systems. Furthermore, for embedded systems, low power consumption should be generally considered together with high computing performance. FPGAs, as programmable logic devices able to support different types of fine-grained parallelisms, their power and performance advantages were recognized widely. However, designing applications on FPGA-based systems is traditionally far from a task can be carried out by software programmers. Generally, hardware engineers and even system-level software engineers have more hardware/architectural knowledge but fewer algorithm and application knowledge. Thus, it is critical for computing systems to allow application-level programmers to realize their idea conveniently, which is popular in computing systems based on the general processor. In this paper, the OpenHEC (Open Framework for High-Efficiency Computing) framework is proposed to provide a design framework for application-level software programmers to use FPGA-based platforms. It frees users from hardware and architectural details to let them focus more on algorithms/applications. This framework was integrated with the commercial Xilinx ISE/Vivado to make it to be used immediately. After implementing a widely-used feature detection algorithm on OpenHEC from the perspective of software programmers, it shows this framework is applicable for application programmers with little hardware knowledge.

研究动机与目标

• 使应用级软件开发人员无需深入硬件知识即可设计基于 FPGA 的系统。
• 通过提供高层抽象框架，弥合应用开发人员与 FPGA 硬件之间的差距。
• 与 Xilinx ISE/Vivado 等现有商业 FPGA 工具链无缝集成，确保即用性。
• 通过实际算法实现（如特征检测）展示框架的适用性。
• 在保持低功耗的同时，支持 FPGA 上高效、高性能的计算。

提出的方法

• OpenHEC 框架提供高层编程接口，抽象 FPGA 特定的硬件细节，如寄存器传输、内存层次结构和并行性管理。
• 与 Xilinx ISE 和 Vivado 工具链集成，支持在 FPGA 平台上直接综合与实现。
• 框架支持类似 C/C++ 的编程结构，使应用开发人员能够以熟悉的软件风格表达算法。
• 通过自动化高层次综合技术，自动将高层算法结构映射到优化的硬件架构。
• 通过针对 FPGA 执行量身定制的运行时和编译时优化，管理数据流与并行性。
• 通过软件可访问的 API 暴露硬件资源，实现软件逻辑与硬件加速器之间的无缝交互。

实验结果

研究问题

• RQ1 无 FPGA 专业知识的应用程序员能否高效地在 FPGA 平台上实现复杂算法？
• RQ2 高层框架在保持性能和功耗效率的同时，能否有效抽象低层硬件复杂性？
• RQ3 与传统以硬件为中心的设计流程相比，OpenHEC 在多大程度上降低了基于 FPGA 系统的开发门槛？
• RQ4 该框架能否与商业 FPGA 工具链集成，以确保即刻部署和可用性？
• RQ5 当应用于计算机视觉算法等实际计算工作负载时，该框架的性能如何？

主要发现

• OpenHEC 框架成功使硬件知识极少的应用开发人员能够实现基于 FPGA 的加速器。
• 一种广泛使用的特征检测算法在 OpenHEC 上成功实现，证明了其实际适用性。
• 该框架抽象了低层 FPGA 细节，使开发人员能够专注于算法逻辑，而非硬件实现。
• 与 Xilinx ISE/Vivado 的集成实现了即刻部署和工具链兼容性。
• 该方法降低了 FPGA 编程的开发门槛，使硬件加速对以软件为中心的应用开发人员更加可及。
• 该框架保持了高性能和低功耗，符合嵌入式系统的需求。