[论文解读] Quantum error correction below the surface code threshold

Rajeev Acharya, Laleh Aghababaie-Beni+247 more|arXiv (Cornell University)|Aug 24, 2024

Quantum Computing Algorithms and Architecture被引用 31

一句话总结

这篇论文展示了在两个超导处理器上低于阈值的表面码存储，借助码距离实现指数级误差抑制和实时解码，并揭示在极低误差率下由相关事件引起的错误地板。

ABSTRACT

Quantum error correction provides a path to reach practical quantum computing by combining multiple physical qubits into a logical qubit, where the logical error rate is suppressed exponentially as more qubits are added. However, this exponential suppression only occurs if the physical error rate is below a critical threshold. In this work, we present two surface code memories operating below this threshold: a distance-7 code and a distance-5 code integrated with a real-time decoder. The logical error rate of our larger quantum memory is suppressed by a factor of $Λ$ = 2.14 $\pm$ 0.02 when increasing the code distance by two, culminating in a 101-qubit distance-7 code with 0.143% $\pm$ 0.003% error per cycle of error correction. This logical memory is also beyond break-even, exceeding its best physical qubit's lifetime by a factor of 2.4 $\pm$ 0.3. We maintain below-threshold performance when decoding in real time, achieving an average decoder latency of 63 $μ$s at distance-5 up to a million cycles, with a cycle time of 1.1 $μ$s. To probe the limits of our error-correction performance, we run repetition codes up to distance-29 and find that logical performance is limited by rare correlated error events occurring approximately once every hour, or 3 $ imes$ 10$^9$ cycles. Our results present device performance that, if scaled, could realize the operational requirements of large scale fault-tolerant quantum algorithms.

研究动机与目标

• Show below-threshold surface-code memories using distance-5 and distance-7 codes on superconducting processors.
• Demonstrate real-time decoding with low latency while maintaining below-threshold performance.
• Quantify error suppression, lifetime, and stability of logical qubits over hours of operation.
• Investigate error budgets, leakage, and correlated errors affecting ultra-low error regimes.
• Explore repetition codes to identify and understand high-distance error floors.

提出的方法

• Implement distance-5 and distance-7 surface codes on 72- and 105-qubit superconducting processors.
• Use offline neural network and ensemble matching decoders; also develop and test a real-time streaming decoder with Sparse Blossom variants.
• Leakage removal (DQLR) and leakage mitigation strategies to reduce correlated errors.
• Inject coherent errors to map logical error versus detection probabilities and validate threshold-like behavior.
• Measure logical error per cycle εd and fit Λ from ln(εd) versus code distance.
• Run high-distance repetition codes up to d=29 to probe ultra-low error regimes and identify error floors.

Figure 1: Surface code performance. a, Schematic of a distance-7 surface code on a 105-qubit processor. Each measure qubit (blue) is associated with a stabilizer (blue colored tile). Red outline: one of nine distance-3 codes measured for comparison ( $3\times 3$ array). Orange outline: one of four d

实验结果

研究问题

• RQ1 Can surface codes operate below the threshold with real-time decoding on superconducting processors?
• RQ2 How does logical error per cycle εd scale with code distance d below threshold?
• RQ3 What are the dominant contributors to the logical error budget (local vs correlated errors, leakage, stray interactions)?
• RQ4 What is the achievable logical memory lifetime relative to constituent physical qubits?
• RQ5 What ultra-low error behavior and potential floors emerge from high-distance repetition codes?

主要发现

• Distance-7 surface-code memory shows ε7 ≈ (1.43 ± 0.03)×10^-3 per cycle with Λ = 2.14 ± 0.02 (neural network decoder).
• Distance-5 memory achieves Λ ≈ 2.18 ± 0.07 with below-threshold performance and surpasses break-even lifetimes by about 2.4×.
• Real-time decoding latency is ~63 μs on average, sustaining up to 1.1 s experiments while maintaining below-threshold operation.
• High-distance repetition codes (d=29) demonstrate Λ = 8.4 ± 0.1, with logical error per cycle well below 10^-6, but exhibit an apparent floor near 10^-10 at distances ≥15 due to correlated bursts.
• Leakage removal (DQLR) substantially improves Λ for distance-5 codes, indicating leakage as a crucial factor in transmon-based error correction.
• Ultra-long runs reveal rare correlated error bursts (~once per hour) that set an error floor and motivate further mitigation.

Figure 2: Error sensitivity in the surface code. a, One cycle of the surface code circuit, focusing on one data qubit and one measure qubit. Black bar: CZ, H: Hadamard, M: measure, R: reset, DD: dynamical decoupling. Orange: Injected coherent errors. Purple: Data qubit leakage removal (DQLR) [ 33 ]