[论文解读] Roadmap to fault tolerant quantum computation using topological qubit arrays

David Aasen|ArXiv.org|Feb 17, 2025

Quantum Information and Cryptography被引用 4

一句话总结

该论文概述了一个四代设备路线图，用于基于Majorana拓扑量子比特（tetrons）的容错量子计算，详述了设备设计、基于测量的操作以及面向晶格手术整合的错误检测/纠错协议。

ABSTRACT

This data accompanies the preprint "Roadmap to fault tolerant quantum computation using topological qubit arrays" and contains simulation data used in the figures.

研究动机与目标

• Motivate and define a concrete device roadmap for fault-tolerant quantum computation using topological qubits based on Majorana zero modes (MZMs).
• Describe four generations of devices (single-qubit, two-qubit, eight-qubit, and 2D topological qubit arrays) and their required components and protocols.
• Present measurement-based benchmarking, measurement-based braiding, quantum error detection, and scalable error correction pathways for tetrons.
• Highlight design features, operating principles, error sources, and anticipated advantages for utility-scale quantum computation.

提出的方法

• Propose a device architecture based on two-sided tetrons in a superconductor-semiconductor heterostructure enabling interferometric Majorana parity measurements.
• Define measurement-based qubit operations where Pauli measurements (X and Z) are native and Clifford gates are realized via measurement sequences.
• Introduce measurement-based braiding transformations to implement single-qubit Clifford operations with a two-qubit device.
• Detail a scalable roadmap including a 4x2 tetron array for quantum error detection and a larger lattice-surgery-capable array for logical qubits with fault distance 7.

实验结果

研究问题

• RQ1 Can measurement-based Pauli measurements on Majorana-based tetrons realize a complete Clifford gate set for fault-tolerant quantum computation?
• RQ2 What device generations and capabilities are required to demonstrate measurement-based braiding, quantum error detection, and lattice-surgery-enabled logical qubits?
• RQ3 What are the dominant error sources in tetron-based architectures and how can they be mitigated through design (e.g., cutter-based control) and error-detection codes?
• RQ4 How does the proposed architecture compare in practicality and scalability to conventional qubit platforms for utility-scale quantum computing?
• RQ5 What protocols and metrics (MBQB, error detection, lattice surgery) are needed to validate progress along the roadmap?

主要发现

• A concrete four-generation roadmap is proposed, culminating in a topological qubit array capable of lattice surgery demonstrations on two logical qubits.
• Single-qubit MBQB enables measurement-based benchmarking of topological qubits using X and Z measurements.
• Two-qubit devices support measurement-based braiding to perform single-qubit Clifford operations and entangling measurements.
• An eight-qubit device demonstrates improved two-qubit operation performance when performed on logical qubits rather than physical qubits.
• A 2D tetron array enables quantum error detection and sets the stage for scalable quantum error correction with lattice surgery.