[论文解读] SoftWear: Software-Only In-Memory Wear-Leveling for Non-Volatile Main Memory

Christian Hakert, Kuan-Hsun Chen+6 more|arXiv (Cornell University)|Apr 7, 2020

Parallel Computing and Optimization Techniques参考文献 25被引用 5

一句话总结

本文提出了一种纯软件实现、与硬件无关的非易失性主内存（NVM）磨损均衡系统，利用CPU特性——内存管理单元（MMU）、性能计数器和中断——来近似写入计数并实现基于老化状态的磨损均衡。通过结合MMU的粗粒度页级重映射与循环方式的细粒度栈重定位，该系统实现了高达78.43%的理想内存寿命，相较于未缓解磨损的情况，耐久性提升了超过900倍。

ABSTRACT

Several emerging technologies for byte-addressable non-volatile memory (NVM) have been considered to replace DRAM as the main memory in computer systems during the last years. The disadvantage of a lower write endurance, compared to DRAM, of NVM technologies like Phase-Change Memory (PCM) or Ferroelectric RAM (FeRAM) has been addressed in the literature. As a solution, in-memory wear-leveling techniques have been proposed, which aim to balance the wear-level over all memory cells to achieve an increased memory lifetime. Generally, to apply such advanced aging-aware wear-leveling techniques proposed in the literature, additional special hardware is introduced into the memory system to provide the necessary information about the cell age and thus enable aging-aware wear-leveling decisions. This paper proposes software-only aging-aware wear-leveling based on common CPU features and does not rely on any additional hardware support from the memory subsystem. Specifically, we exploit the memory management unit (MMU), performance counters, and interrupts to approximate the memory write counts as an aging indicator. Although the software-only approach may lead to slightly worse wear-leveling, it is applicable on commonly available hardware. We achieve page-level coarse-grained wear-leveling by approximating the current cell age through statistical sampling and performing physical memory remapping through the MMU. This method results in non-uniform memory usage patterns within a memory page. Hence, we further propose a fine-grained wear-leveling in the stack region of C / C++ compiled software. By applying both wear-leveling techniques, we achieve up to $78.43\%$ of the ideal memory lifetime, which is a lifetime improvement of more than a factor of $900$ compared to the lifetime without any wear-leveling.

研究动机与目标

• 为解决PCM和FeRAM等NVM技术在高写入工作负载下可能几分钟内失效的有限写入耐久性问题。
• 克服现有磨损均衡方案依赖专用硬件进行写入计数跟踪的问题，从而降低复杂度和成本。
• 通过利用广泛可用的CPU特性（如MMU、性能计数器和中断），在通用硬件上实现基于老化的磨损均衡。
• 通过粗粒度页级重映射与细粒度栈区域磨损均衡，降低内存磨损的非均匀性。
• 证明纯软件磨损均衡可在可接受的运行时开销下实现接近理想内存寿命。

提出的方法

• 利用性能计数器在固定间隔（每n次内存写入）生成中断，以统计方式采样写入分布。
• 采用基于MMU的页级重映射，根据近似写入计数将内存页物理重定位。
• 通过将栈内容复制到新位置并利用硬件辅助的环绕机制更新栈指针，实现循环式栈重定位。
• 配置内存保护和访问权限，在写入采样期间记录目标地址，以实现写入计数的近似。
• 结合粗粒度MMU重映射与细粒度栈级磨损均衡，以减少内存页内的热点。
• 使用归一化耐久性（NE）作为指标，将磨损均衡效果与理论理想寿命进行比较。

实验结果

研究问题

• RQ1 是否可以在不使用专用内存硬件的情况下有效实现NVM的磨损均衡？
• RQ2 标准CPU特性（MMU、性能计数器、中断）在多大程度上可以近似写入计数，以支持基于老化的磨损均衡？
• RQ3 与基于理想硬件的磨损均衡相比，纯软件方法在NVM单元间平衡写入分布方面的有效性如何？
• RQ4 对栈区域进行细粒度磨损均衡是否能显著提升整体内存寿命？
• RQ5 在纯软件解决方案中，磨损均衡质量与运行时开销之间的权衡如何？

主要发现

• 所提出的纯软件磨损均衡系统实现了高达78.43%的理论理想内存寿命，相较于无磨损均衡的情况，寿命提升超过900倍。
• 粗粒度MMU重映射与细粒度循环栈重定位的结合，有效降低了内存页内的写入非均匀性。
• 该系统完全运行在通用硬件上，无需定制内存控制器或额外芯片面积。
• 性能开销可接受且可调节，支持在磨损均衡质量与运行时成本之间进行权衡。
• 即使采用写入计数的统计近似，该方法仍能实现显著的耐久性提升，证明了纯软件磨损均衡的可行性。
• 该方法具有可扩展性，可通过动态重定位技术适配其他内存区域（如数据/bss和堆）