[论文解读] SORIS: A Self-Organized Reconfigurable Intelligent Surface Architecture for Wireless Communications

Evangelos Koutsonas, Boulogeorgos, Alexandros-Apostolos A.+4 more|arXiv (Cornell University)|Jan 30, 2026

Advanced Wireless Communication Technologies被引用 0

一句话总结

SORIS 提出一种自组织 RIS，使用单天线微控制器接收机通过少量发射元件获取 CSI，然后利用 ML 对剩余 RIS 进行预测性配置，实现无需外部 CSI 反馈链路的实时自组织。

ABSTRACT

In this paper, a new reconfigurable intelligent surface (RIS) hardware architecture, called self-organized RIS (SORIS), is proposed. The architecture incorporates a microcontroller connected to a single-antenna receiver operating at the same frequency as the RIS unit elements, operating either in transmission or reflection mode. The transmitting RIS elements enable the low latency estimation of both the incoming and outcoming channels at the microcontroller's side. In addition, a machine learning approach for estimating the incoming and outcoming channels involving the remaining RIS elements operating in reflection mode is devised. Specifically, by appropriately selecting a small number of elements in transmission mode, and based on the channel reciprocity principle, the respective channel coefficients are first estimated, which are then fed to a low-complexity neural network that, leveraging spatial channel correlation over RIS elements, returns predictions of the channel coefficients referring to the rest of elements. In this way, the SORIS microcontroller acquires channel state information, and accordingly reconfigures the panel's metamaterials to assist data communication between a transmitter and a receiver, without the need for separate connections with them. Moreover, the impact of channel estimation on the proposed solution, and a detailed complexity analysis for the used model, as well as a wiring density and control signaling analysis, is performed. The feasibility and efficacy of the proposed self-organized RIS design and operation are verified by Monte Carlo simulations, providing useful guidelines on the selection of the RIS elements for operating in transmission mode for initial channel estimation.

研究动机与目标

• Motivate and enable real-time self-organization of RIS hardware to overcome CSI feedback and latency challenges.
• Propose a RIS architecture with dual transmit/reflect modes and a microcontroller receiver to acquire instantaneous CSI on-the-fly.
• Develop a low-complexity ML-based channel prediction method that extrapolates CSI for passive RIS elements using spatial correlation.
• Provide complexity, wiring, and control signaling analyses to assess practicality in realistic setups.
• Evaluate the impact of hardware impairments on channel estimation through Monte Carlo simulations.

提出的方法

• Introduce SORIS hardware where RIS elements can operate in transmission or reflection mode and a microcontroller receiver captures signals from transmission-mode elements.
• Select a small subset of RIS elements to operate in transmission mode to estimate BS-RIS and RIS-UE channels using a deterministic RIS-to-microcontroller link.
• Estimate BS-RIS and RIS-UE channels for the active elements, then use a low-complexity recurrent neural network to predict channels for inactive elements leveraging spatial correlation.
• Utilize channel reciprocity to relate UE-RIS and RIS-UE channels, and feed estimated coefficients into the ML predictor to obtain the full H and Hu matrices.
• Analyze algorithmic complexity, wiring density, and control signaling requirements.
• Assess the impact of hardware impairments via Monte Carlo simulations.

实验结果

研究问题

• RQ1 How can a RIS be self-organized to acquire instantaneous CSI without extensive feedback links?
• RQ2 Can a small number of transmitting RIS elements enable accurate CSI estimation for both BS-RIS and RIS-UE channels?
• RQ3 Can a neural network predict the channels of inactive RIS elements using spatial correlation and limited initial measurements?
• RQ4 What are the complexity, wiring, and control signaling implications of the SORIS architecture in realistic settings?
• RQ5 How do hardware impairments at the microcontroller receiver affect channel estimation accuracy?

主要发现

• A novel RIS hardware architecture (SORIS) enables real-time CSI acquisition at the RIS microcontroller using a single RF chain.
• A small set of transmitting RIS elements suffices to estimate BS-RIS and RIS-UE channels, which are then extrapolated to inactive elements via ML.
• A low-complexity RNN-based predictor, leveraging spatial correlation, yields CSI predictions for all RIS elements without external feedback.
• The architecture exhibits favorable complexity, wiring density, and control signaling characteristics, suitable for microsecond-scale coherence times in mmWave systems.
• Monte Carlo simulations illuminate guidelines for selecting transmission-mode elements to maximize estimation accuracy under SORIS constraints.
• Impairments in the microcontroller receiver are analyzed and their impact on estimation accuracy is quantified.