[论文解读] The readout supervisor firmware for controlling the upgraded LHCb detector and readout system

F. Alessio, P. Durante+1 more|arXiv (Cornell University)|Jun 22, 2018

Particle Detector Development and Performance参考文献 4被引用 3

一句话总结

本文提出了一款VHDL固件核心——读出监控器（Readout Supervisor），专为升级后的LHCb探测器在40 MHz串行交叉运行模式下设计，用于同步和控制读出系统。该核心实现了精确的定时信号分发、事件构建以及可配置的控制功能，适用于校准和不同运行条件，实现了所有读出组件在40 Tb/s数据速率下的全同步，通过实时逻辑在LHCb实验2019年升级中构建了完全可配置的框架。

ABSTRACT

In 2019, the LHCb experiment at CERN will undergo a major upgrade where its detector electronics and the entire readout system will be replaced. The goal is to read-out all events at the full LHC frequency of 40 MHz, reaching a total data rate of ~40 Tb/s. In this context, a new timing, trigger and readout control system has been developed: its main tasks are to distribute centrally the clock, the timing information and to synchronize all elements in the readout system: from the very last Front-End ASIC to the building of events to be stored. The heart of the timing and readout control system is a VHDL firmware core that is now finalized and currently in use in test-benches and test-beams by the upgraded sub-detectors, for their initial commissioning phase. Such firmware core is able to generate all necessary processes to keep the synchronization of all readout elements with the LHC bunch crossing as well as it is able to generate asynchronous commands for calibration or test purposes. It is also able to accommodate for specific recipes to handle varying running conditions, by using a generic and fully configurable approach. In this paper, the philosophy and the implementation behind such firmware are described in details, posing particular emphasis to the real-time logical processes that were developed in order to satisfy the requirements of synchronization and readout control of the upgraded LHCb detector.

研究动机与目标

• 为在40 MHz下运行的升级版LHCb探测器开发一个集中化的定时、触发和读出控制系统。
• 确保所有读出元件（从前端ASIC到事件构建器）与LHC串行交叉精确同步。
• 提供一种通用的、完全可配置的固件解决方案，能够处理多样的运行条件和测试/校准指令。
• 实现实时控制与协调升级后LHCb系统中整个读出链路。

提出的方法

• 作为定时、触发和读出协调的中心控制器，实现VHDL固件核心。
• 设计实时逻辑流程，以与LHC串行交叉（40 MHz）保持同步。
• 集成异步命令生成机制，用于校准和测试程序，独立于主定时流。
• 采用通用且完全可配置的架构，以适应多样的运行和调试条件。
• 在测试平台和测试束流中部署并验证固件，用于初始子探测器调试。
• 向所有读出组件集中分发时钟和定时信号，以确保全局同步。

实验结果

研究问题

• RQ1 如何通过单一固件核心实现对40 Tb/s数据系统中所有读出组件的精确同步？
• RQ2 在40 MHz下管理事件构建和定时信号分发，需要何种实时控制机制？
• RQ3 固件如何同时支持正常运行和异步校准/测试指令？
• RQ4 何种架构原则使得LHCb读出系统能够实现对多种运行条件的完全可配置性？

主要发现

• 读出监控器固件成功实现了所有读出元件与LHC串行交叉在40 MHz下的精确同步，支持全速率数据采集。
• 固件同时支持持续同步与独立的异步校准/诊断指令。
• 通过通用固件架构实现完全可配置性，可适应多样的运行和调试场景。
• 固件已在测试平台和测试束流中得到验证，确认其已具备用于LHCb探测器升级的准备就绪状态。
• 该实现实现了对整个读出链路中时钟、定时和触发信号的集中控制。