[论文解读] Thermal Management in Fine-Grained 3-D Integrated Circuits

Arıf Iqbal, Naveen Kumar Macha+3 more|arXiv (Cornell University)|Mar 10, 2018

3D IC and TSV technologies参考文献 1被引用 3

一句话总结

本文提出了一类通用的物理级热管理特性——热结点和导热纳米柱，用于解决因堆叠晶体管与基底热隔离而引起的严重热点问题。通过三维有限元建模，作者证明这些特性可使峰值温度较未管理的设计降低高达53%，显著改善了晶体管级三维集成的热性能。

ABSTRACT

For beyond 2-D CMOS logic, various 3-D integration approaches specially transistor based 3-D integrations such as monolithic 3-D [1], Skybridge [2], SN3D [3] holds most promise. However, such 3D architectures within small form factor increase hotspots and demand careful consideration of thermal management at all levels of integration [4] as stacked transistors are detached from the substrate (i.e., heat sink). Traditional system level approaches such as liquid cooling [5], heat spreader [6], etc. are inadequate for transistor level 3-D integration and have huge cost overhead [7]. In this paper, we investigate the thermal profile for transistor level 3-D integration approaches through finite element based modeling. Additionally, we propose generic physical level heat management features for such transistor level 3-D integration and show their application through detailed thermal modeling and simulations. These features include a thermal junction and heat conducting nano pillar. The heat junction is a specialized junction to extract heat from a selected region in 3-D; it allows heat conduction without interference with the electrical activities of the circuit. In conjunction with the junction, our proposed thermal pillars enable heat dissipation through the substrate; these pillars are analogous to TSVs/Vias, but carry only heat. Such structures are generic and is applicable to any transistor level 3-D integration approaches. We perform 3-D finite element based analysis to capture both static and transient thermal behaviors of 3-D circuits, and show the effectiveness of heat management features. Our simulation results show that without any heat extraction feature, temperature for 3-D integrated circuits increased by almost 100K-200K. However, proposed heat extraction feature is very effective in heat management, reducing temperature from heated area by up to 53%.

研究动机与目标

• 为解决在晶体管与基底热隔离的细粒度3D集成电路中出现的关键热挑战。
• 克服传统系统级冷却方法（如液冷和散热片）在晶体管级别成本高且无效的局限性。
• 开发通用且可扩展的物理级热管理解决方案，适用于多种3D集成架构（如单片3D和Skybridge）。
• 通过非侵入式、电绝缘的热结构实现在晶体管级别的有效散热。

提出的方法

• 采用有限元法（FEM）对3D集成电路中的静态和瞬态热行为进行建模。
• 引入热结点作为专用的电绝缘但热导率高的界面，可在不干扰电路运行的情况下从特定区域提取热量。
• 提出导热纳米柱作为热通孔（类似于TSV），实现热量在基底中的垂直传导。
• 将所提出的特性集成到3D电路模型中，并在实际功耗分布条件下进行评估。
• 通过热仿真比较有无散热特性时的温度分布。
• 在多种3D集成架构中验证该方法，证明其通用性和可扩展性。

实验结果

研究问题

• RQ1 在晶体管与基底分离的细粒度3D集成电路中，热点如何形成并演化？
• RQ2 传统系统级热管理技术在多大程度上能缓解3D IC中晶体管级别的热问题？
• RQ3 非侵入式、电绝缘的热特性能否有效从堆叠的晶体管层中提取热量？
• RQ4 热结点和导热纳米柱在降低3D IC峰值温度方面有多高效？
• RQ5 与基线设计相比，所提出的物理级特性可实现多大的热性能提升？

主要发现

• 在未采用任何热管理特性的情况下，由于堆叠晶体管的热隔离，3D集成电路的峰值温度会上升100K至200K。
• 所提出的热结点和纳米柱特性在模拟的3D IC中可将峰值温度降低高达53%。
• 热结点可在不干扰电路电气功能的前提下实现局部热量提取。
• 导热纳米柱作为热通孔，能高效地将热量通过基底传递至下层。
• 有限元建模证实了静态和瞬态热性能的改善，验证了所提特性的有效性。
• 该热管理方案具有通用性，适用于多种晶体管级3D集成方法，包括单片3D和Skybridge。