[论文解读] Silicide-based Josephson field effect transistors for superconducting qubits

Tom Doekle Vethaak|arXiv (Cornell University)|Sep 6, 2022

Surface and Thin Film Phenomena被引用 4

一句话总结

该论文展示了在50 nm栅长PtSi基约瑟夫森场效应晶体管中实现栅压可调的Andreev电流，通过硅基异质结构中的静电栅调控超导近邻效应，实现了CMOS兼容的超导量子比特集成。该工作建立了一个可扩展的超导量子计算平台，为基于硅基异质结构的电学调控超导近邻效应提供了新途径。

ABSTRACT

Scalability in the fabrication and operation of quantum computers is key to move beyond the NISQ era. So far, superconducting transmon qubits based on aluminum Josephson tunnel junctions have demonstrated the most advanced results, though this technology is difficult to implement with large-scale facilities. An alternative "gatemon" qubit has recently appeared, which uses hybrid superconducting/semiconducting (S/Sm) devices as gate-tuned Josephson junctions. Current implementations of these use nanowires however, of which the large-scale fabrication has not yet matured either. A scalable gatemon design could be made with CMOS Josephson Field-Effect Transistors as tunable weak link, where an ideal device has leads with a large superconducting gap that contact a short channel through high-transparency interfaces. High transparency, or low contact resistance, is achieved in the microelectronics industry with silicides, of which some turn out to be superconducting. The first part of the experimental work in this thesis covers material studies on two such materials: $ ext{V}_3 ext{Si}$ and PtSi, which are interesting for their high $T_ ext{c}$, and mature integration, respectively. The second part covers experimental results on 50 nm gate length PtSi transistors, where the transparency of the S/Sm interfaces is modulated by the gate voltage. At low voltages, the transport shows no conductance at low energy, and well-defined features at the superconducting gap. The barrier height at the S/Sm interface is reduced by increasing the gate voltage, until a zero-bias peak appears around zero drain voltage, which reveals the appearance of an Andreev current. The successful gate modulation of Andreev current in a silicon-based transistor represents a step towards fully CMOS-integrated superconducting quantum computers.

研究动机与目标

• 利用硅基异质结构中的硅化物基约瑟夫森场效应晶体管，开发一种可扩展且CMOS兼容的超导量子比特架构。
• 通过实现大规模制造，克服传统铝基Transmon量子比特和纳米线基Gatemons的局限性。
• 利用具有高临界温度（Tc）和成熟工艺的硅化物材料，实现高透明度的超导/半导体（S/Sm）异质界面。
• 在硅基平台上实现通过栅压调制对Andreev束缚态的静电控制。
• 通过实验验证，栅压可调节S/Sm界面的透明度，从而实现对超电流输运的调控。

提出的方法

• 采用CMOS兼容工艺在硅基底上制备了50 nm栅长的PtSi基晶体管。
• 选用具有高Tc和已在微电子领域验证的硅化物材料（V3Si和PtSi），以增强超导能隙和界面透明度。
• 通过静电栅压调制S/Sm界面的势垒高度，从而调控界面透明度和近邻效应。
• 在低温下（低至4 K）进行输运测量，探测亚能隙电导和Andreev束缚态。
• 测量微分电导（dI/dV）随栅压和漏极电压的变化，以检测Andreev反射特征和零偏压峰。
• 施加栅压以抑制超导能隙并诱导出现零偏压电导峰，表明Andreev电流的产生。

实验结果

研究问题

• RQ1 在硅基平台上，50 nm栅长的PtSi基约瑟夫森场效应晶体管能否实现栅压可调的Andreev电流？
• RQ2 在硅化物基异质结构中，栅压在多大程度上可调制S/Sm界面的透明度？
• RQ3 微分电导中出现的零偏压峰是否证实了在静电控制下Andreev束缚态的出现？
• RQ4 高透明度的硅化物界面（如PtSi）能否支持适用于可扩展超导量子比特的相干超电流输运？
• RQ5 硅化物基约瑟夫森结的集成是否与标准CMOS制造工艺兼容，适用于大规模量子电路？

主要发现

• 当栅压增加且漏极电压为零时，出现了明显的零偏压电导峰，表明Andreev电流的起始。
• 在低栅压和低漏极电压下，系统无亚能隙电导，且在超导能隙能量处表现出清晰的特征，与Andreev反射被抑制一致。
• 随着栅压增加，S/Sm界面的势垒高度降低，透明度增强，同时出现相干的Andreev峰。
• 在50 nm PtSi晶体管中观测到Andreev电流的栅压调制，证实了在硅基平台上对超电流输运的静电控制。
• 该器件在多次测量中表现出可重复的输运行为，当栅压关闭时，低能区电导显著降低。
• 结果表明，利用硅化物基约瑟夫森场效应晶体管实现全CMOS集成的超导量子处理器具有可行性。