Jung Hwan Kim

Abstract Halide perovskites, including CsPbX 3 (X = Cl, Br, I), have gained much attention in the field of optoelectronics. However, the toxicity of Pb and the low photoluminescence quantum yield (PLQY) of these perovskites hamper their use. In this work, new halide materials that meet the requirements of: (i) nontoxicity, (ii) high PLQY, and (iii) ease of fabrication of thin films via the solution process are explored. In particular, copper(I) halide compounds with low‐dimensional electronic st

Amorphous InGaZnO<i>_x</i> (a-IGZO) thin-film transistors (TFTs) are currently used in flat-panel displays due to their beneficial properties. However, the mobility of ∼10 cm²/(V s) for the a-IGZO TFTs used in commercial organic light-emitting diode TVs is not satisfactory for high-resolution display applications such as virtual and augmented reality applications. In general, the electrical properties of amorphous oxide semiconductors are strongly dependent on their chemical

The variety of semiconductor materials has been extended in various directions, for example, to very wide bandgap materials such as oxide semiconductors as well as to amorphous semiconductors. Crystalline β-Ga2O3 is known as a transparent conducting oxide with an ultra-wide bandgap of ~4.9 eV, but amorphous (a-) Ga2Ox is just an electrical insulator because the combination of an ultra-wide bandgap and an amorphous structure has serious difficulties in attaining electronic conduction. This paper

Abstract In the field of photonics, alkali copper(I) halides attract considerable attention as lead‐free emitters. The intrinsic quantum confinement effects originating from low‐dimensional electronic structure lead to high photoluminescence quantum yields (PLQYs). Among them, Cs 3 Cu 2 I 5 is the most promising candidate, satisfying both high PLQY and air stability. In this study, a strategy to explore a new material meeting these requirements through the use of the mixed‐anions of I − and Cl −

Low-dimensional (low-D) luminescent materials have attracted significant attention due to the high photoluminescent quantum yields. However, it is unclear whether low-D materials are superior to 3D materials for electroluminescent (EL) devices given that low-D materials have poor charge transport nature due to their highly localized electronic structures. We noticed a significant phenomenon that EL performances for 3D materials, such as CsPbX3, are governed by adjacent charge transport layers, w

The transparency of oxide semiconductors is a significant feature that enables the fabrication of fully transparent electronics. Unfortunately, practical transparent electronics using amorphous oxide semiconductors (AOSs) have not yet been realized, owing to significant photo-instabilities of these materials. Previous studies have revealed that the photo-instability can be attributed to sub-gap states (SGSs) near the valence-band maximum (VBM). Thus, it is inferred that the energy difference bet

Low-dimensional lead-free luminescent halides have emerged as highly promising phosphors for white-light emission. Recently, we reported a broadband blue-emitting copper(I) iodide-based material, Cs3Cu2I5, with a high photoluminescence quantum yield (PLQY) (∼90%) and a zero-dimensional nature, providing significant dimensionality for the photoactive site. However, this material is insufficient as a white-light emitter owing to the deficient yellow emission. In this paper, we report a novel yello

Abstract Transparent amorphous semiconductors (TAS) that can be fabricated at low temperature are key materials in the practical application of transparent flexible electronics. Although various n‐type TAS materials with excellent performance, such as amorphous In‐Ga‐Zn‐O (a‐IGZO), are already known, no complementary p‐type TAS has been realized to date. Here, a material design concept for p‐type TAS materials is proposed utilizing the pseudo s‐orbital nature of spatially spreading iodine 5p orb

In this work, high-performance amorphous In_0.75Ga_0.23Sn_0.02O (<i>a</i>-IGTO) transistors with an atomic layer-deposited Al₂O₃ dielectric layer were fabricated at a maximum processing temperature of 150 °C. Hydrogen (H) and excess oxygen (O_i) in the Al₂O₃ film, which was controlled by adjusting the oxygen radical density (P_O2: flow rate of O₂/[Ar+O₂]) in the radio-frequency (rf

Over the past several decades, tin monoxide (SnO) has been studied extensively as a p-type thin film transistor (TFT). However, its TFT performance is still insufficient for practical use. Many studies suggested that the instability of the valence state of Sn (Sn 2+ /Sn 4+ ) is a critical reason for the poor performance such as limited mobility and low on/off ratio. For SnO, the Sn 5s–O 2p hybridized state is a key component for obtaining p-type conduction. Thus, a strategy for stabilizing the S

Abstract Metal halide perovskites (MHPs) are plausible candidates for practical p‐type semiconductors. However, in thin film transistor (TFT) applications, both 2D PEA 2 SnI 4 and 3D FASnI 3 MHPs have different drawbacks. In 2D MHP, the TFT mobility is seriously reduced by grain‐boundary issues, whereas 3D MHP has an uncontrollably high hole density, which results in quite a large threshold voltage ( V th ). To overcome these problems, a new concept based on a 2D–3D core–shell structure is herei

Abstract We investigated the effect of film thickness (geometrical confinement) on the structural evolution of sputtered indium-zinc-tin oxide (IZTO) films as high mobility n-channel semiconducting layers during post-treatment at different annealing temperatures ranging from 350 to 700 °C. Different thicknesses result in IZTO films containing versatile phases, such as amorphous, low-, and high-crystalline structures even after annealing at 700 °C. A 19-nm-thick IZTO film clearly showed a phase t

High Resolution Image Download MS PowerPoint Slide Amorphous oxide semiconductors (AOSs) with low off-currents and processing temperatures offer promising alternative materials for next-generation high-density memory devices. The complex vertical stacking process of memory devices significantly increases the probability of encountering internal contact issues. Conventional surface treatment methods developed for planar devices necessitate efficient approaches to eliminate contact issues at deep