Myung-Jae Lee

We present a high-performance back-illuminated three-dimensional stacked single-photon avalanche diode (SPAD), which is implemented in 45-nm CMOS technology for the first time. The SPAD is based on a P <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> /Deep N-well junction with a circular shape, for which N-well is intentionally excluded to achieve a wide depletion region, thus enabling lower tunneling noise and better timing jitter as well as

We investigate the effects of guard-ring (GR) structures on the performance of silicon avalanche photodetectors (APDs) fabricated with the standard complementary metal-oxide-semiconductor (CMOS) technology. Four types of CMOS-compatible APDs (CMOS-APDs) based on the p <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> / n-well junction with different GR structures are fabricated, and their electric-field profiles are simulated and analyzed. Cur

Abstract Single-photon detection and photon counting are useful tools in many fields, from light detection and ranging (LiDAR) to biomedical imaging and from time-resolved Raman spectroscopy to quantum applications. In this context, recently, single-photon avalanche diode (SPAD) sensors in standard CMOS technology have been receiving considerable attention from both scientific and industrial communities since they can provide single-photon detection and photon-counting capabilities along with so

This paper reports on the first implementation of a single-photon avalanche diode (SPAD) in standard silicon on insulator (SOI) complementary metal-oxide-semiconductor (CMOS) technology. The SPAD is realized in a circular shape, and it is based on a P(+)/N-well junction along with a P-well guard-ring structure formed by lateral diffusion of two closely spaced N-well regions. The SPAD electric-field profile is analyzed by means of simulation to predict the breakdown voltage and the effectiveness

This paper discusses design optimization for silicon avalanche photodetectors (APDs) fabricated in standard complementary metal-oxide-semiconductor (CMOS) technology in order to achieve the highest possible performance. Such factors as PN junctions, guard ring structures, active areas, and back-end structures are considered for the optimization. CMOS-APDs reflecting varying aspects of these factors are fabricated and their performances are characterized. In addition, their characteristics are an

We present the world's first backside-illuminated (BSI) single-photon avalanche diode (SPAD) based on standard silicon-on-insulator (SOI) complementary metal-oxide-semiconductor (CMOS) technology. This SPAD achieves a good dark count rate (DCR) after backside etching, comparable to DCRs of BSI SPADs fabricated on bulk wafers. Unlike bulk-wafer-based BSI SPADs, which typically suffer from poor violet and blue sensitivity, the proposed BSI SPAD features increased near-ultraviolet sensitivity as we

We present a silicon avalanche photodetector (APD) based on multiple P <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> /N-well junctions fabricated in standard complementary metal-oxide-semiconductor (CMOS) technology. In order to overcome the photodetection-bandwidth limitation of the CMOS-APD based on P <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> /N-well junction, carrier-accelerat

A self-oscillating harmonic opto-electronic mixer based on a CMOS-compatible avalanche photodetector for fiber-fed 60-GHz self-heterodyne systems is demonstrated. The mixer is composed of an avalanche photodetector fabricated with 0.18-mum standard CMOS process and an electrical feedback loop for self oscillation. It simultaneously performs photodetection and frequency up-conversion of photodetected signals into the second harmonic self-oscillation frequency band. The avalanche photodetector and

In this paper, we present 10 μm diameter SPADs fabricated in 110 nm CIS technology based on an N <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> /HVPW junction, with enhanced sensitivity at short wavelengths. To reduce tunneling noise due to the highly-doped layers in the process, a doping compensation technique is used, which allows to adjust the doping profile of the HVPW. Thanks to this technique, DCR is reduced by a factor of 24 at 2 V e

In this study, for the establishment of a safety evaluation method, non-destructive tests were performed by developing a full-scale model pier and simulating scour on the ground adjacent to a field pier. The surcharge load (0–250 kN) was applied to the full-scale model pier to analyze the load’s effect on the stability. For analyzing the pier’s behavior according to the impact direction, an impact was applied in the bridge axis direction, pier length direction, and pier’s outside direction. The

We characterize and analyze silicon avalanche photodetectors (APDs) fabricated with standard complementary metal-oxide-semiconductor (CMOS) technology. Current characteristics, responsivity, avalanche gain, and photodetection bandwidth of CMOS-APDs based on two types of PN junctions, N-well/P-substrate and P+/N-well junctions, are compared and analyzed. It is demonstrated that the CMOS-APD using the P+/N-well junction has higher responsivity as well as higher photodetection bandwidth than N-well

We demonstrate a fiber-fed 60-GHz self-heterodyne system using a self-oscillating harmonic optoelectronic mixer (SO-HOM) based on a Si avalanche photodetector (APD) fabricated with 0.18 μm standard complementary metal-oxide-semiconductor (CMOS) process. The proposed SO-HOM consists of a CMOS-compatible APD and a feedback electrical loop for self-oscillation. It simultaneously performs photodetection and harmonic optoelectronic frequency up-conversion of photodetected data signals to the 2 <sup x

This study was carried out to evaluate the weathering durability of waterborne preservative (AAC, ACQ, CCA, CuAz) treated Japanese red pine (Pinus densiflora S. et Z.) sapwood samples by accelerated weathering, and to find out the factor of stability. When considered the color changes, weight losses, surface degradation, and microstructure changes due to weathering, ACQ-, CCA-, and CuAz-treated samples were durable against weathering; the weathering durability of AAC-treated samples was poor and

본 논문에서는 석션파일의 인발거동을 조사하기 위해 유한차분법 상용 프로그램인 FLAC3D를 이용하여 수치해석을 수행하였다. 석션파일의 인발지지력을 전통적인 지지력 식을 이용하여 구하고, 이 값을 파일의 직경, 길이, 그리고 주변 점토의 비배수 전단강도를 변수로 하는 수치해석을 통한 해석 값과 비교하였다. 총 24개의 수치해석 결과를 바탕으로 석션파일의 인발파괴는 석션파일의 배수조건뿐만 아니라 파일의 제원과 주변 지반의 물성값에 의해 형태가 결정되는 것으로 밝혀졌다. 수치해석 결과로부터 석션파일 내부 주면에 발현되는 전단응력을 구하여 활동파괴와 인장파괴 중 어떤 파괴가 발생할 것인지를 결정하는데 사용하였다. 외부주면의 전단응력과 관계없이 높은 내부 전단응력을 얻은 경우 수치해석 내에서 활동파괴가 발생하는 경우가 많았으며, 이는 전통적인 지지력 공식으로부터 얻은 예측과 잘 맞았다. This paper presents the pullout behavior of suction pile us