Woojun Choi
Yonsei University · Engineering
About the Lab
Professor Woojun Choi's research lab specializes in the design and synthesis of atomically precise noble metal nanoclusters for energy conversion applications. The lab focuses on understanding and manipulating the electronic and geometric structures of these nanoclusters to enhance their catalytic performance in electrochemical reactions such as CO₂ reduction and hydrogen evolution. By integrating molecular-level precision with functional materials engineering, the lab develops highly selective and efficient electrocatalysts through strategies like heteroatom doping, atomic site transplantation, and bimetallic alloying. Their work bridges fundamental surface science with practical energy technologies, emphasizing structure-property relationships at the atomic scale.
Research Overview
Research Output Trend
Figures are computed from collected data and may differ slightly.
Selected Papers
15This paper presents a compact resistor-based CMOS temperature sensor intended for dense thermal monitoring. It is based on an <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$RC$ </tex-math></inline-formula> poly-phase filter (PPF), whose temperature-dependent phase shift is read out by a frequency-locked loop (FLL). The PPF’s phase shift is determined by a zero-crossing (ZC) detector, allowing the rest of the
This article presents a wireless neural implant with body-coupled (BC) data transmission and power delivery for freely behaving animals and incorporates a precision front end for high-quality neural recordings. The neural implant utilizes the body as a wireless transmission medium where it only needs small electrodes for data transmission and power delivery. An external device with patch electrodes can then be placed far away from the implant without the need for precise alignment. Furthermore,
This article presents a 64 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times $ </tex-math></inline-formula> 64 indirect time-of-flight (iToF) image sensor with a depth range of 50 m, integrated into a 1P4M 110-nm CMOS process. The sensor is based on a single-photon avalanche diode (SPAD), the range-dependent phase delay of which is measured by compact analog time-gated pulse counters and then read out by
This article presents an energy-efficient dual- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$RC$ </tex-math></inline-formula> frequency reference intended for wireless sensor nodes. It consists of a digital frequency-locked loop (FLL) in which the frequency of a digitally controlled oscillator (DCO) is locked to a temperature-independent phase shift derived from two different <inline-formula xmlns:mml="http
This letter describes a compact resistor-based temperature sensor intended for the thermal monitoring of microprocessors and DRAMs. It consists of an RC poly phase filter (PPF) that is read out by a frequency-locked loop (FLL) based on a dual zero-crossing (ZC) detection scheme. The sensor, fabricated in 65-nm CMOS, occupies 5800 μm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and achieves moderate accuracy [±1.2 °C (3σ)] over a wide temp
Mobile DRAMs are essential to support memory-intensive operations for smartphones and tablet PCs [1, 2]. Since mobile DRAM standard (LPDDR), for the next generation, targets the speed specification of 51.2GB/s, its I/O interface demands high bandwidth, low power and high efficiency. Single-ended signaling has been used for LPDDR interfaces due to 100% pin efficiency. However, as the data rate increases simultaneous switching noise (SSN) limits the bandwidth. Although differential signaling can e
This paper presents a time-of-flight (ToF) image sensor for outdoor applications. The sensor employs a gain-modulated avalanche photodiode (APD) that achieves high modulation frequency. The suppression capability of background light is greatly improved up to 200klx by using a combination of inpixel auto-zeroing and chopping. A 64×64 APD-based ToF sensor is fabricated in a 0.11μm CMOS. It achieves depth ranges from 0.5 to 2 m with 25MHz modulation and from 2 to 20 m with 1.56MHz modulation. For b
This paper presents a compact temperature sensor that directly controls a temperature-dependent self-refresh period of a mobile DRAM in 28nm CMOS. It uses a dynamic threshold MOST (DTMOST) as a sensing device that periodically discharges a capacitor. The discharging voltage across the capacitor denotes a supply-independent behavior and the temperature-dependent discharging period of the DTMOST diode is detected by incorporating it into a relaxation oscillator. The sensor occupies only 0.017mm <s
This letter presents an area-efficient and PVT-insensitive segmented duty-cycled resistor (SDR) intended for neural recording amplifiers. The feedback resistor of the capacitively coupled low-noise amplifier is realized with segmentation of the polysilicon resistor and supplementary switches in between. The proposed SDR suppresses impedance reduction due to the switching of the resistor’s parasitic capacitance. It ensures higher than 1- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/Math
Wireless sensor nodes in battery-powered internet-of-things (IoT) applications require a stable on-chip frequency reference with low energy (<; 10pJ/cycle) and high frequency stability (below ±300ppm). CMOS RC frequency references are promising due to their low-cost integration and high energy efficiency [1-5]. Conventional RC references, however, achieve only moderate accuracy (a few %) due to the large temperature coefficient (TC) of on-chip resistors [3]. First-order TC compensation can be ac
This letter presents a CMOS indirect time-of-flight (i-ToF) image sensor, which is based on a single-photon avalanche diode (SPAD) and a compact in-pixel time-gated pulse counter. The proposed SPADbased i-ToF sensor makes it possible to achieve a time-gated photon counting method at the pixel level and to enlarge a depth range up to 40 m while maintaining the pixel demodulation frequency up to 25 MHz. A prototype sensor is implemented in a 110-nm CMOS process and has a pixel array of 64 × 64 wit
This letter describes a compact resistor-based temperature sensor intended for the thermal monitoring of microprocessors and DRAMs. It consists of an RC poly phase filter (PPF) that is read out by a frequency-locked loop (FLL) based on a dual zero-crossing (ZC) detection scheme. The sensor, fabricated in 65-nm CMOS, occupies 5800 μm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and achieves moderate accuracy [±1.2 °C (3σ)] over a wide temp
This paper describes an all-CMOS embedded temperature sensor that directly controls the self-refresh period of a 25nm mobile DRAM. It occupies 0.02mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , and achieves 0.04°C resolution and ±2°C accuracy from 20°C to 95°C after a single temperature trim. This performance is enabled by the use of dynamic threshold MOSFETs as temperature sensing devices, and by using chopping and trimming to mitigat
In microprocessors and DRAMs, on-chip temperature sensors are essential components, ensuring reliability by monitoring thermal gradients and hot spots. Such sensors must be as small as possible, since multiple sensors are required for dense thermal monitoring. However, conventional BJT-based temperature sensors are not compatible with the sub-1V supply of advanced processes. Subthreshold MOSFETs can operate from lower supplies, but at high temperatures their performance is limited by leakage [1,
This paper presents a neural interface that senses the electrical double layer (EDL) capacitance as a function of the ion concentration produced by neurons firing action potentials (AP). Unlike conventional microelectrode arrays (MEAs) detecting voltage, capacitance sensing allows access to multiple recording sites with a single wire using code-division multiplexing (CDM), thereby significantly reducing the number of required interconnects. In this work, we implemented 32 drivers and 32 analog f
Research Areas
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