임성일 교수

Mo-based van der Waals heterojunction p-n diodes with p-type α-MoTe2 and n-type MoS2 are fabricated on glass, and demonstrate excellent static and dynamic device performances at a low voltage of 5 V, with an ON/OFF current ratio higher than 10(3) , ideality factors of 1.06, dynamic rectification at a high frequency of 1 kHz, high photoresponsivity of 322 mA W(-1) , and an external quantum efficiency of 85% under blue-light illumination.

Top-gate ferroelectric memory transistors with single- to triple-layered MoS2 nanosheets adopting poly(vinylidenefluoride-trifluoroethylene) [P(VDF-TrFE)] are demonstrated. The nonvolatile memory transistor with a single-layer MoS2 channel exhibits excellent retention properties for more than 1000 s, maintaining ~5 × 103 for the program/erase ratio and displaying a high mobility of ~220 cm2/(V·s). Detailed facts of importance to specialist readers are published as ”Supporting Information”. Such

A van der Waals (vdW) Schottky junction between two-dimensional (2D) transition metal dichalcogenides (TMDs) is introduced here for both vertical and in-plane current devices: Schottky diodes and metal semiconductor field-effect transistors (MESFETs). The Schottky barrier between conducting NbS₂ and semiconducting n-MoS₂ appeared to be as large as ∼0.5 eV due to their work-function difference. While the Schottky diode shows an ideality factor of 1.8-4.0 with an on-to-off cu

We report on the nanosheet-thickness effects on the performance of top-gate MoS(2) field-effect transistors (FETs), which is directly related to the MoS(2) dielectric constant. Our top-gate nanosheet FETs with 40 nm thin Al(2)O(3) displayed at least an order of magnitude higher mobility than those of bottom-gate nanosheet FETs with 285 nm thick SiO(2), benefiting from the dielectric screening by high-k Al(2)O(3). Among the top-gate devices, the single-layered FET demonstrated the highest mobilit

High‐performance, air‐stable, p‐channel WSe 2 top‐gate field‐effect transistors (FETs) using a bilayer gate dielectric composed of high‐ and low‐ k dielectrics are reported. Using only a high‐k Al 2 O 3 as the top‐gate dielectric generally degrades the electrical properties of p‐channel WSe 2 , therefore, a thin fluoropolymer (Cytop) as a buffer layer to protect the 2D channel from high‐ k oxide forming is deposited. As a result, a top‐gate‐patterned 2D WSe 2 FET is realized. The top‐gate p‐chan

ZnO thin film has been deposited on a sapphire (001) at a temperature of 400 °C using a pulsed laser deposition with oxygen pressures of 1, 20, 50, 200, 300, and 500 mTorr. As the oxygen pressure for the thin film deposition increases, the grain size of the films increases up to a certain point, but then the size decreases over 50 mTorr as measured by x-ray diffractometry and scanning electron microscopy. In contrast, the intensity of UV photoluminescence continuously increases with the oxygen p

Superior electrostatic and dynamic performances were acquired from the diode on glass when a dipole-containing fluoropolymer was employed for encapsulation.

Two-dimensional (2D) molybdenum disulfide (MoS₂) field-effect transistors (FETs) have been extensively studied, but most of the FETs with gate insulators have displayed negative threshold voltage values, which indicates the presence of interfacial traps both shallow and deep in energy level. Despite such interface trap issues, reports on trap densities in MoS₂ are quite limited. Here, we probed top-gate MoS₂ FETs with two- (2L), three- (3L), and four-layer (4L) MoS₂/dielectric interfaces to quan

Stable uniform performance inkjet-printed polymer transistor arrays, which allow demonstration of flexible full-color displays, were achieved by new ambient processable conjugated copolymer semiconductor, and OTFT devices incorporating this material showed high mobility values>1.0 cm2 V(-1) s(-1). Bias-stress stability of the devices was improved with a channel-passivation layer, which suppresses the density of trap states at the channel interface.

Very recently, stacked two-dimensional materials have been studied, focusing on the van der Waals interaction at their stack junction interface. Here, we report field effect transistors (FETs) with stacked transition metal dichalcogenide (TMD) channels, where the heterojunction interface between two TMDs appears useful for nonvolatile or neuromorphic memory FETs. A few nanometer-thin WSe₂ and MoTe₂ flakes are vertically stacked on the gate dielectric, and bottom <i>p-</i>Mo