Atsutake Kosuge 교수

This paper presents a mmWave imaging radar-based real-time multi-class object recognition system for ADAS applications related to construction machinery. While mmWave radar has the advantage of being able to detect signals even in the optically harsh, dark, and dusty environments in which construction machinery is often used, the radar has two orders of magnitude lower resolution than cameras. Since the distance from the radar increases, object features vary, resulting in making it difficult to

The pulse shape and phase of isolated attosecond extreme ultraviolet (XUV) pulses with a duration of 860 asec have been determined simultaneously by using frequency-resolved optical gating based on two-photon above-threshold ionization with 28-eV photons in He. From the detailed characterization, we succeeded in shaping isolated XUV pulses on an attosecond time scale by precise dispersion control with Ar gas density or by changing the driving pulse width. These results offer a novel way to excit

The conventional picking robots suffered from low picking throughput due to a large amount of computation of the object-pose-estimation algorithm which is called iterative-closest-point (ICP) algorithm. This article presents an field-programmable gate array (FPGA)-based ICP accelerator, which achieves 11.7-times-faster object-pose estimation by a picking robot compared with the state-of-the-art technique based on K-D-tree <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http:/

An 8.5-Gb/s/link non-contact multi-drop bus is presented. The signal reflections that limit the data rates of conventional multi-drop bus interfaces are dramatically reduced by using transmission line couplers at each signal branching point. As an energy-equipartitioned technique provides the same signal level to every port, wider receiver margin is achieved. The data rate is improved by 1.8 times compared to the most advanced multi-drop bus interface. The theoretical analysis and design techniq

A reconfigurable field-programmable gate array (FPGA)-based wired-logic deep neural network (DNN) accelerator is presented. High energy efficiency of 16 nJ/classification (Modified National Institute of Standards and Technology: MNIST) is achieved due to the wired-logic architecture. Each neuron in the neural network consists of combinational circuits only, and all the neurons are implemented on an FPGA. Intermediate data are never stored in memory or registers and are transmitted to the output

A non-contact interface for modular smartphones that can provide a data connection at a maximum MIPI rate of 6 Gb/s has been developed. A two-fold transmission line coupler, which is a small-size coupler that has a wide bandwidth, is proposed for modular smartphones, where the layout area is strictly limited. The coupler size is 6 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> for a 5 mm communication distance, which is 1/24 smaller than

An object-pose estimation acceleration technique for picking robot applications by using hierarchical-graph-reusing k-nearest-neighbor search (k-NN) has been developed. The conventional picking robots suffered from low picking throughput due to a large amount of computation of the object-pose estimation, especially the one for k-NN search, which determines plural neighboring points for every data point. To accelerate the k-NN search, this work introduces a hierarchical graph to the object-pose e

Modular smart phones have been attracting attention (Fig. 10.1.1) because users can freely customize their phones by purchasing modules and assembling them [1]. The transfer of data between modules is accomplished by non-contact connectors. Because the connection electrodes are not exposed, there is no wear or damage and waterproofing is possible. The methods of constructing non-contact connectors include capacitive coupling, which uses flat plate electrodes [1], magnetic coupling, which uses co

A highly reliable wireless solid-state drive (SSD) system for future applications of large volume storage is presented. The wireless interface in the system consists of an inductively coupled power link with fast transmission power control and high-speed data links using transmission line couplers (TLCs). The wireless power link can deliver 1 W from the host to the SSD. The full duplex wireless data interface achieves raw data rate of 1.6 Gb/s. The reliability of the wireless interface is studie

This paper presents an overview of proximity wireless communication (PWC) technologies, their principles, design guidelines and practical applications. In particular, two different applications of PWC are reviewed. One is PWC between stacked chips. Both communication distance and coupler size are several tens of microns. Area and energy efficient design techniques are introduced. Another is PWC between module boards. Both communication distance and coupler size are several millimeters. Energy an

A 6 Gb/s 9.8 pJ/b rotatable non-contact connector applicable to industrial robot arms is developed. The proposed non-contact connector enables a high-speed and highly reliable wireless data connection between three-dimensional (3-D) cameras and an edge computer in an autonomously controlled robot. A rotatable transmission line coupler (RTLC) is proposed to accommodate the rotational operation of the robot arm. Since the proposed doughnut-shaped RTLC has a constant overlapped area at any rotation

A pipelined wired-logic deep neural network (DNN) processor implemented in a 16-nm field-programmable gate array (FPGA) is presented. The latency and power required for memory access are minimized by utilizing the wired-logic architecture, thus enabling low power and high throughput operation. One technical issue with the wired-logic architecture is that it requires a lot of hardware resources. To reduce them, two core technologies are developed: (1) a convolutional non-linear neural network (CN

An FPGA-based accelerator for the iterative-closest-point (ICP) algorithm has been proposed, which achieves 4.8-times-faster object-pose estimation by a picking robot compared with the state-of-the-art technique. Experiments of the proposed FPGA-based ICP accelerator using Amazon Picking Contest data sets have confirmed that the object-pose estimation by the ICP takes only 0.6 seconds, and the entire picking process takes 2.0 seconds with power consumption of 6.0 W.

An SoC-FPGA-based motion-planning accelerator operating on a graph with >10M edges is presented for the first time for dual-am-robot manipulation systems. The proposed modified A∗ algorithm with minimized memory access time, is further accelerated by extensive parallel computation and dynamic reconfigurations. The proposed accelerator has been verified by measurement result showing overall motion-planning time of 0.5 seconds, which is only 1/100 of the one by conventional algorithm on embedded C

A noncontact and housing-less thin–thick connecting method was developed for mobile industry processor interface (MIPI) applications. This paper describes the world's first 0.15-mm-thick connector using a vertical directional coupler (VDC) which enables simultaneous two-link communication with one coupler without fatal performance degradation. We have analyzed the conditions for isolating two links in a coupler, and the design method is discussed. A fully balanced pulse transmitter implemented i