Hanyang University · 工学
Professor Taikyu Kim's research lab specializes in the development and optimization of advanced semiconductor materials for next-generation thin-film transistors, with a strong focus on oxide semiconductors, tellurium-based 2D materials, and p-type semiconductor integration. The lab explores novel fabrication techniques such as atomic layer deposition, sputtering, and plasma treatment to achieve high-performance, low-temperature processed devices compatible with CMOS technology. Key research directions include enhancing field-effect mobility, reducing contact resistance, and controlling defect states—particularly oxygen vacancies—to enable high-performance, scalable transistors for 3D integrated electronics and flexible optoelectronics.
Figures are computed from collected data and may differ slightly.
As Si has faced physical limits on further scaling down, novel semiconducting materials such as 2D transition metal dichalcogenides and oxide semiconductors (OSs) have gained tremendous attention to continue the ever-demanding downscaling represented by Moore's law. Among them, OS is considered to be the most promising alternative material because it has intriguing features such as modest mobility, extremely low off-current, great uniformity, and low-temperature processibility with conventional
Abstract Achieving high-performance p-type semiconductors has been considered one of the most challenging tasks for three-dimensional vertically integrated nanoelectronics. Although many candidates have been presented to date, the facile and scalable realization of high-mobility p-channel field-effect transistors (FETs) is still elusive. Here, we report a high-performance p-channel tellurium (Te) FET fabricated through physical vapor deposition at room temperature. A growth route involving Te de
Oxide semiconductors have gained significant attention in electronic device industry due to their high potential for emerging thin-film transistor (TFT) applications. However, electrical contact properties such as specific contact resistivity (ρ<sub>C</sub>) and width-normalized contact resistance (R<sub>C</sub>W) are significantly inferior in oxide TFTs compared to conventional silicon metal oxide semiconductor field-effect transistors. In this study, a multi-stack interlayer (IL) consisting of
Oxide semiconductors are considered as one of the most promising candidates for back‐end‐of‐line transistors for monolithic 3D integration due to various advantages, such as complementary metal–oxide–semiconductor (CMOS)‐compatible method, low fabrication temperature, and promising electrical characteristics. As such, the demand for p‐type oxide semiconductors that are comparable to their n‐type oxide counterparts is increasing. However, the inferior electrical characteristics of p‐channel field
This study investigates the effect of oxygen plasma (PO) on the crystalline structure of tellurium (Te) thin films during reactive sputtering. Introduction of oxygen radicals suppresses uncontrolled rapid growth of hexagonal Te crystals, amorphizing the deposited Te thin film. This amorphous phase changes to the hexagonal phase upon alumina encapsulation. A 4-nm-thick Te transistor with a PO of 7% exhibits outstanding device performances, with a field-effect mobility up to 40.8 cm2V−1s−1 and an
In this study, we examine the effect of oxygen vacancies ( V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">O</sub> ) near the back surface of p-type tin monoxide (SnO) semiconductors on the device performance of its thin-film transistors (TFTs). Non-stoichiometry of the SnO surface layer was controlled through oxidant exposure conditions during alumina (Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlin
Metal–interlayer–semiconductor contact reduces metal-induced gap states, mitigating Fermi-level pinning at metal/semiconductor interface. Here, switching property of p-type SnO FET is enhanced by increasing electron Schottky barrier at off-state.
This paper reports a new p-type tin oxyselenide (SnSeO), which was designed with the concept that the valence band edge from O 2p orbitals in the majority of metal oxides becomes delocalized by hybridizing Se 4p and Sn 5s orbitals. As the Se loading increased, the SnSeO film structures were transformed from tetragonal SnO to orthorhombic SnSe, which was accompanied by an increase in the amorphous phase portion and smooth morphologies. The SnSe<sub>0.56</sub>O<sub>0.44</sub> film annealed at 300
In general, the electronic and optical properties of oxide films can significantly benefit from highly textured crystallinity. However, oxide films grown by atomic layer deposition (ALD), a powerful technique for the synthesis of high-quality, nanoscale thin films, usually exhibit amorphous or randomly oriented polycrystalline phases. Here, we demonstrate the growth of highly textured rutile phase ALD TiO<sub>2</sub> films through rational substrate design. Both <i>a</i>- and <i>c</i>-axis prefe
In this Letter, we report a demonstration of p-channel tin monoxide (SnO) thin-film transistors (TFTs) with high field-effect mobility (μFE) exceeding 10 cm2/Vs and hysteresis-free like behavior. We demonstrate that maintaining metallic states before encapsulation is a key process to enhance μFE in p-type SnO thin-films. Sustaining this meta-stability involves the following two processes during fabrication: (1) postdeposition annealing (PDA) in two steps and (2) encapsulation in the middle of ea
Abstract In today's era of rapid data proliferation, interconnect bottlenecks pose major challenges for conventional binary computing systems. These challenges encompass not only managing vast data volumes but also the substantial power consumption associated with data processing. To address these limitations, ternary logic systems have attracted considerable interest due to their capability to process information at higher densities within the same physical footprint compared to binary logic sy
This study presents considerable improvements in the electrical characteristics of atomic-layer-deposited 3-nm-thick In2O3 thin-film transistors (TFTs), which were achieved by introducing a 2-nm-thick amorphous Al2O3 interfacial layer to passivate the surface of a polycrystalline HfO2 gate dielectric. The resulting devices exhibited exceptional electrical characteristics, including an ultrahigh field-effect mobility (μFE) of approximately 147.5 ± 16.6 cm2/V s, subthreshold swing of 103.7 ± 9.1 m
Development of p‐type inorganic semiconductors for high performance thin‐film transistor (TFT) can be an essential ingredient for next‐generation display applications which requires a low power consumption. However, the conventional p‐type oxide semiconductors exhibit the poor electrical characteristics, which is mainly attributed to the inefficient conduction path formation from oxygen 2p orbitals. Here, we report a new p‐type material, tin oxyselenide (SnSeO) semiconductors for high performanc
A holder which converts the discrete input signal into continuous form by interpolation or extrapolation of the input pulse train is used frequently as an accessory of a digital computer.And this so called zero-order holder is commonly used.The purpose of this paper is to find a systematic procedure for obtaining the transfer function of higher-order holders from Lagrange's interpolation formula connected with directly sampled values and to show the characteristics of the systems thus found.A ge
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