[論文レビュー] GPT4AIGChip: Towards Next-Generation AI Accelerator Design Automation via Large Language Models
The paper investigates leveraging large language models (LLMs) to automate AI accelerator design and presents GPT4AIGChip, an LLM-powered, demo-augmented, modular design framework that decouples hardware templates and uses in-context learning to iteratively generate high-quality AI accelerator designs.
The remarkable capabilities and intricate nature of Artificial Intelligence (AI) have dramatically escalated the imperative for specialized AI accelerators. Nonetheless, designing these accelerators for various AI workloads remains both labor- and time-intensive. While existing design exploration and automation tools can partially alleviate the need for extensive human involvement, they still demand substantial hardware expertise, posing a barrier to non-experts and stifling AI accelerator development. Motivated by the astonishing potential of large language models (LLMs) for generating high-quality content in response to human language instructions, we embark on this work to examine the possibility of harnessing LLMs to automate AI accelerator design. Through this endeavor, we develop GPT4AIGChip, a framework intended to democratize AI accelerator design by leveraging human natural languages instead of domain-specific languages. Specifically, we first perform an in-depth investigation into LLMs' limitations and capabilities for AI accelerator design, thus aiding our understanding of our current position and garnering insights into LLM-powered automated AI accelerator design. Furthermore, drawing inspiration from the above insights, we develop a framework called GPT4AIGChip, which features an automated demo-augmented prompt-generation pipeline utilizing in-context learning to guide LLMs towards creating high-quality AI accelerator design. To our knowledge, this work is the first to demonstrate an effective pipeline for LLM-powered automated AI accelerator generation. Accordingly, we anticipate that our insights and framework can serve as a catalyst for innovations in next-generation LLM-powered design automation tools.
研究の動機と目的
- Assess the capabilities and limitations of current LLMs for generating AI accelerator designs in high-level synthesis (HLS).
- Develop a framework (GPT4AIGChip) that enables LLM-driven, automated AI accelerator design using decoupled templates and demo-augmented prompts.
- Demonstrate that LLMs can produce high-quality accelerator designs with reduced human effort and expertise.
- Propose design principles for LLM-friendly templates to improve generation quality and synthesize-ability.
- Provide insights that guide future research in LLM-powered hardware design automation.
提案手法
- Conduct a systematic assessment of LLMs (e.g., GPT-4, CodeGen) on HLS-based AI accelerator tasks.
- Identify common failures (e.g., misinterpretation of variables, long dependency issues, and partial instruction adherence).
- Propose a decoupled, modular, hierarchical hardware template to reduce dependencies and code size.
- Develop a demo-augmented prompt generator to enhance in-context learning with high-quality demonstrations.
- Use an evolutionary search (tournament selection) over a design space with modular hardware templates to optimize accelerator designs.
- Implement a three-stage validation flow: synthesizability check, correctness verification, and performance assessment.
実験結果
リサーチクエスチョン
- RQ1Can current LLMs reliably generate synthesize-able HLS code for AI accelerators based on user instructions?
- RQ2Do decoupled, modular templates improve LLM-assisted accelerator design generation compared to traditional templates?
- RQ3Can in-context learning with demo-augmented prompts enable effective LLM-driven exploration of the accelerator design space?
- RQ4What configuration of hardware design parameters (e.g., MAC array sizes, NoC styles, buffer sizes) yields best performance within the GPT4AIGChip framework?
- RQ5Is a closed-sourced, powerful LLM (e.g., GPT-4) preferable to finetuned open-source LLMs for data-limited design tasks?
主な発見
| LLM | Pass@100 |
|---|---|
| GPT-4 w/o finetune | 42% |
| CodeGen w/o finetune | 0% |
| CodeGen w/ finetune | 31% |
- LLMs frequently generate non-synthesizable or incorrect hardware code without targeted prompts and templates.
- A decoupled, modular, hierarchical hardware template enables step-by-step LLM generation and reduces dependency-related failures.
- In-context learning with high-quality demonstrations significantly improves design outcomes; more demonstrations improve reasoning and module selection.
- GPT-4 (closed-source) outperforms finetuned open-source CodeGen in Pass@100 on a basic HLS inner product task (GPT-4 w/o finetune: 42% vs CodeGen w/o finetune: 0%; CodeGen w/ finetune: 31%).
- The GPT4AIGChip pipeline, combining a demo-augmented prompt generator with an LLM-friendly template, plus an evolutionary search, can generate competitive AI accelerator designs validated on FPGA hardware.
- The design space includes MAC array sizes, NoC styles, on-chip buffer sizes and partitioning, and data reuse patterns, navigated via tournament selection to identify high-performance designs.
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