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곽상훈 교수

Sanghun Kwon

서울대학교 · 수학

연구실 소개

곽상훈 교수의 연구실은 반도체 및 임베디드 시스템의 핵심 기술인 고성능, 저전력 아날로그/디지털 회로 설계와 시스템 통합 기술에 중점을 두고 있습니다. 특히 고속·저지연 아날로그 회로, 하이브리드 애드어 아키텍처, 그리고 하이브리드 전기차의 통합 전력 제어 유닛 설계를 통해 통합성과 효율성을 극대화하는 기술을 연구하고 있습니다. 또한 이와 연계해 이식성 있는 비동기 하드웨어 설계 환경 및 시스템 온 칩(SoC) 설계 기법도 함께 개발하고 있습니다.

하이브리드 애드어통합 전력 제어 유닛비동기 하드웨어 설계고성능 회로 설계시스템 통합

연구 현황

논문 수
30
총 인용 수
91
최근 5년 논문
13
주요 분야
수학

연구 성과 추이

표시된 성과는 수집된 데이터 기준으로 산출되며, 일부 차이가 있을 수 있습니다.

5개년 연도별 논문 게재 수
13총합
2021
2022
2023
2024
2025
5개년 연도별 피인용 수
17총합
20212022202320242025

주요 논문

15
1
논문|인용수 39·2010
A Small But Non-negligible Flaw in the Android Permission Scheme
Wook‐Geun Shin, Sanghoon Kwak, Shinsaku Kiyomoto, K. Fukushima, Toshiaki Tanaka
FWCI 6.5

This paper presents a flaw in the permission scheme of Android. The Android framework enforces a permission-based security policy where an application can access the other parts of the system only when the application is explicitly permitted. The security of the framework depends to a large extent on the owner of a device since the authorization decisions are mainly made by the user. As a result, the permission scheme imposes much of the administrative burden on the user instead of keeping it si

Signal ProcessingComputer Science
2
논문|인용수 13·1994
Hydrotreatment process kinetics for bitumen and bitumen-derived liquids
Sanghoon Kwak, D.C. Longstaff, Milind Deo, F.V. Hanson
SJR Q1Fuel
Analytical ChemistryChemistry
3
논문|인용수 4·2023
Coarse geometry of pure mapping class groups of infinite graphs
George Domat, Hannah Hoganson, Sanghoon Kwak
SJR Q1FWCI 2.2Advances in Mathematics
Geometry and TopologyMathematics
4
논문|인용수 4·2023
Free products from spinning and rotating families
Mladen Bestvina, Ryan Dickmann, George Domat, Sanghoon Kwak, Priyam Patel, Emily Stark
FWCI 1.1L’Enseignement MathématiqueOA

The far-reaching work of Dahmani–Guirardel–Osin (2017) and recent work of Clay– Mangahas–Margalit (2021) provide geometric approaches to the study of the normal closure of a subgroup (or a collection of subgroups) in an ambient group G . Their work gives conditions under which the normal closure in G is a free product. In this paper we unify their results and simplify and significantly shorten the proof of the theorem of Dahmani–Guirardel–Osin (2017).

Geometry and TopologyMathematics
5
논문|인용수 3·2016
A performance-aware yield analysis and optimization of manycore architectures
Jeong‐Gun Lee, Sanghoon Kwak
SJR Q1FWCI 0.3Computers & Electrical Engineering
Hardware and ArchitectureComputer Science
6
논문|인용수 3·2021
On translation lengths of Anosov maps on the curve graph of the torus
Hyungryul Baik, Changsub Kim, Sanghoon Kwak, Hyunshik Shin
SJR Q2FWCI 0.4Geometriae Dedicata
Geometry and TopologyMathematics
7
논문|인용수 3·2009
Design of asynchronous MSP430 microprocessor using balsa back-end retargeting
Sanghoon Kwak, Hyung-Woo Lee, Y. Zafar, Myeong‐Hoon Oh, Dongsoo Har
FWCI 0.3

Balsa developed by Advanced Processor Technology (APT) Group of Manchester University presents robust design environment that supports both a framework for synthesizing asynchronous hardware systems and the language for describing such systems. In this paper, a design of microprocessor, MSP430, in balsa language and the functional verification of the controller is presented. Back-end retargeting is performed as a part of the design methodology in balsa. By back-end retargeting procedure, a new t

Hardware and ArchitectureComputer Science
8
논문|인용수 3·2012
Synthesis of Adaptable Hybrid Adders for Area Optimization under Timing Constraint
Yonghwan Kim, Sanghoon Kwak, Taewhan Kim
SJR Q2ACM Transactions on Design Automation of Electronic Systems

Satisfying the timing constraint is the utmost concern in the integrated circuit design and it is true that most critical timing paths in a circuit cover one or more arithmetic components such as adder, subtractor, and multiplier of which addition logic is commonly involved. This work addresses the problem of redesigning the addition logic (in a form of hybrid adder) on a critical timing path to meet the timing constraint while minimally allocating the required addition logic. Unlike the convent

Electrical and Electronic EngineeringEngineering
9
논문|인용수 3·2015
The design of an integrated Power Control Unit for Hybrid/Electric vehicle
Sanghoon Kwak, Taehwan Chung, Gunsoo Kang, Jinhwan Jung
FWCI 0.6

Despite the rapid growth of green vehicle markets in recent years, its components including control units are still very expensive compared to those on the gasoline/diesel powered vehicle. In order to reduce costs and save more space on the vehicle, integration technology is required to develop. This paper proposes the development progress and optimization of integrated Power Control Unit of Hybrid/Electric vehicle.

Automotive EngineeringEngineering
10
논문|인용수 2·2009
EXPLORATION OF POWER-DELAY TRADE-OFFS WITH HETEROGENEOUS ADDERS BY INTEGER LINEAR PROGRAMMING
Sanghoon Kwak, Jeong‐Gun Lee, Eun-Gu Jung, Dongsoo Har, M.D. Ercegovac, Jeong–A Lee
SJR Q3FWCI 0.6Journal of Circuits Systems and Computers

The performance of arithmetic adders varies widely in their power consumption, delay, and area requirements. To acquire more fine-grained trade-offs in the power-delay trade-off curve of a binary adder, the heterogeneous adder architecture is adopted. In heterogeneous adder architecture, a binary adder is decomposed into sub-adder blocks with different carry propagation schemes and bit-widths. Thus the method allows us to expand the original design space of a specific type of adder into the more

Electrical and Electronic EngineeringEngineering
11
논문|인용수 2·2008
Design of Heterogeneous Adders Based on Power-Delay Tradeoffs
Sanghoon Kwak, Dongsoo Har, Jeong‐Gun Lee, Jeong–A Lee
FWCI 0.3

The performance of arithmetic adders varies widely in their power consumption, delay, and area requirements. To acquire more fine-grained tradeoffs in the power-delay tradeoff curve of a binary adder, the heterogeneous adder architecture is adopted. In heterogeneous adder architecture, a binary adder is decomposed into sub-adder blocks with different carry propagation schemes and precisions. Thus the method allows us to expand the original design space of a specific type of adder into the more f

Electrical and Electronic EngineeringEngineering
12
preprint|인용수 2·2022
Coarse Geometry of Pure Mapping Class Groups of Infinite Graphs
George Domat, Hannah Hoganson, Sanghoon Kwak
arXiv (Cornell University)OA

We discuss the large-scale geometry of pure mapping class groups of locally finite, infinite graphs, motivated by recent work of Algom-Kfir--Bestvina and the work of Mann--Rafi on the large-scale geometry of mapping class groups of infinite-type surfaces. Using the framework of Rosendal for coarse geometry of non-locally compact groups, we classify when the pure mapping class group of a locally finite, infinite graph is globally coarsely bounded (an analog of compact) and when it is locally coar

Geometry and TopologyMathematics
13
preprint|인용수 2·2019
On Translation Lengths of Anosov Maps on Curve Graph of Torus
Hyungryul Baik, Changsub Kim, Sanghoon Kwak, Hyunshik Shin
arXiv (Cornell University)OA

We show that an Anosov map has a geodesic axis on the curve graph of a torus. The direct corollary of our result is the stable translation length of an Anosov map on the curve graph is always a positive integer. As the proof is constructive, we also provide an algorithm to calculate the exact translation length for any given Anosov map. The application of our result is threefold: (a) to determine which word realizes the minimal translation length on the curve graph within a specific class of wor

Geometry and TopologyMathematics
14
preprint|인용수 2·2022
The Automorphism Group of the Infinite-Rank Free Group is Coarsely Bounded
George Domat, Hannah Hoganson, Sanghoon Kwak
arXiv (Cornell University)OA

We prove that the full automorphism group and the outer automorphism group of the free group of countably infinite rank are coarsely bounded. That is, these groups admit no continuous actions on a metric space with unbounded orbits, and have the quasi-isometry type of a point.

Geometry and TopologyMathematics
15
book chapter|인용수 2·2020
Partition-Based Task Mapping for Communication Energy Minimization in 3D Network-on-Chip
Sanghoon Kwak
FWCI 0.6
Computer Networks and CommunicationsComputer Science

대표 연구 분야

Geometry and TopologyElectrical and Electronic EngineeringHardware and ArchitectureSignal ProcessingAnalytical ChemistryAutomotive Engineering

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