[Paper Review] On the Practical Implementation of Propagation Delay and Clock Skew Compensated High-Precision Time Synchronization Schemes with Resource-Constrained Sensor Nodes in Multi-Hop Wireless Sensor Networks

Xintao Huan, Kyeong Soo Kim|arXiv (Cornell University)|May 2, 2019

Network Time Synchronization Technologies9 references4 citations

TL;DR

This paper proposes an asymmetric high-precision time synchronization (AHTS) scheme for multi-hop wireless sensor networks that offloads all time synchronization computations to a resource-rich head node, avoiding precision loss from single-precision floating-point arithmetic on sensor nodes. Experimental results on TelosB motes show microsecond-level synchronization accuracy, with a mean absolute error (MAE) of 1.8166 μs in single-hop and 2.1774 μs in three-hop scenarios, demonstrating robustness and scalability despite limited sensor node resources.

ABSTRACT

In wireless sensor networks (WSNs), implementing a high-precision time synchronization scheme on resource-constrained sensor nodes is a major challenge. Our investigation of the practical implementation on a real testbed of the state-of-the-art WSN time synchronization scheme based on the asynchronous source clock frequency recovery and the reverse two-way message exchange, which can compensate for both propagation delay and clock skew for higher precision, reveals that its performance on battery-powered, low-complexity sensor nodes is not up to that predicted from simulation experiments due to the limited precision floating-point arithmetic of sensor nodes. Noting the lower computational capability of typical sensor nodes and its impact on time synchronization, we propose an asymmetric high-precision time synchronization scheme that can provide high-precision time synchronization even with resource-constrained sensor nodes in multi-hop WSNs. In the proposed scheme, all synchronization-related computations are done at the head node equipped with abundant computing and power resources, while the sensor nodes are responsible for timestamping only. Experimental results with a testbed based on TelosB motes running TinyOS demonstrate that the proposed time synchronization scheme can avoid time synchronization errors resulting from the single-precision floating-point arithmetic of the resource-constrained sensor nodes and achieve microsecond-level time synchronization accuracy in multi-hop WSNs.

Motivation & Objective

• To investigate the practical limitations of high-precision time synchronization schemes on resource-constrained sensor nodes due to limited floating-point precision.
• To address the cumulative synchronization errors caused by 32-bit single-precision arithmetic in sensor nodes during time synchronization.
• To design a scalable, asymmetric time synchronization scheme that maintains high precision even with low-complexity sensor nodes in multi-hop topologies.
• To validate the proposed scheme through real-world testing on TelosB motes running TinyOS.

Proposed method

• All time synchronization computations, including frequency ratio estimation and logical clock maintenance, are performed exclusively at the head node, relieving sensor nodes of complex arithmetic.
• Sensor nodes are responsible only for timestamping transmission and reception times, minimizing computational load and avoiding floating-point operations.
• The scheme uses reverse two-way message exchange with optional measurement bundling to reduce network overhead and improve scalability in multi-hop networks.
• The head node uses asynchronous source clock frequency recovery (SCFR) to synchronize sensor node clocks in frequency, while maintaining independent phase offsets.
• The method is extended to multi-hop topologies by cascading synchronization links from the head node through intermediate nodes, with each hop’s error tracked and analyzed.
• AHTS leverages the head node’s computational and power resources to achieve sub-microsecond accuracy, bypassing the precision limitations of sensor-side floating-point arithmetic.

Experimental results

Research questions

• RQ1 How does 32-bit single-precision floating-point arithmetic on resource-constrained sensor nodes impact the performance of high-precision time synchronization schemes in practice?
• RQ2 Can time synchronization accuracy be preserved in multi-hop WSNs when sensor nodes are restricted to single-precision arithmetic?
• RQ3 To what extent does the number of hops affect synchronization error accumulation in a time synchronization scheme with limited-precision sensor nodes?
• RQ4 Can offloading all synchronization computations to a centralized head node eliminate precision-related errors in sensor nodes?

Key findings

• The proposed AHTS achieves a mean absolute error (MAE) of 1.8166 μs in single-hop scenarios, outperforming the EE-ASCFR scheme due to elimination of floating-point precision errors.
• In a three-hop topology, the MAE increases to 2.1774 μs, demonstrating a cumulative error increase of approximately 0.2 μs per hop.
• Over 85% of measurement time estimation errors are within ±10 μs across all hops, indicating consistent high-precision performance in multi-hop environments.
• The distribution of estimation errors shows that 18% of errors are near zero for Hop 1, decreasing to 14% and 13% for Hop 2 and Hop 3, respectively, reflecting increasing error spread with hop count.
• The scheme successfully mitigates synchronization errors caused by single-precision floating-point arithmetic, enabling microsecond-level accuracy even on low-complexity sensor nodes.
• The results confirm that offloading synchronization computation to a head node is effective in preserving precision and enabling scalable, high-accuracy time synchronization in real-world WSN deployments.