[Paper Review] On the Practicality of Intrinsic Reconfiguration As a Fault Recovery Method in Analog Systems

Garrison W. Greenwood|ArXiv.org|Apr 1, 2004

Evolutionary Algorithms and Applications10 references3 citations

TL;DR

This paper investigates intrinsic reconfiguration using evolvable hardware as a fault recovery method in analog systems under strict time constraints. It demonstrates that reconfiguration time—driven by programming and fitness evaluation—can exceed fault recovery deadlines, making intrinsic evolution viable only if both logical and temporal correctness are proven, with reconfiguration time needing to be less than the system's mandatory recovery deadline.

ABSTRACT

Evolvable hardware combines the powerful search capability of evolutionary algorithms with the flexibility of reprogrammable devices, thereby providing a natural framework for reconfiguration. This framework has generated an interest in using evolvable hardware for fault-tolerant systems because reconfiguration can effectively deal with hardware faults whenever it is impossible to provide spares. But systems cannot tolerate faults indefinitely, which means reconfiguration does have a deadline. The focus of previous evolvable hardware research relating to fault-tolerance has been primarily restricted to restoring functionality, with no real consideration of time constraints. In this paper we are concerned with evolvable hardware performing reconfiguration under deadline constraints. In particular, we investigate reconfigurable hardware that undergoes intrinsic evolution. We show that fault recovery done by intrinsic reconfiguration has some restrictions, which designers cannot ignore.

Motivation & Objective

• To evaluate the practicality of intrinsic reconfiguration as a fault recovery method in analog systems with limited redundancy.
• To identify that reconfiguration time—due to programming and fitness evaluation—can become a critical bottleneck in fault-tolerant systems.
• To establish that fault-tolerant systems using intrinsic reconfiguration must be treated as real-time systems, requiring both logical and temporal correctness.
• To demonstrate that long reconfiguration times, even with modest population sizes and generations, can violate recovery deadlines.
• To argue that proving temporal correctness through failure modes and effects analysis (FMEA) is essential for claiming efficacy of any EHW-based recovery method.

Proposed method

• The study uses intrinsic evolution, where fitness evaluation is performed on physical hardware (FPAA), not in simulation, to reflect real-world reconfiguration delays.
• Reconfiguration time is calculated as the sum of programming time (3.8 ms) and fitness evaluation time (625 ms), totaling 628.8 ms per configuration.
• A genetic algorithm with a population size of 100 and 5,000 generations is used to evolve compensator circuits, resulting in a total reconfiguration time of approximately 8.7 hours.
• The method evaluates the feasibility of intrinsic reconfiguration by comparing total reconfiguration time against system-specific fault recovery deadlines.
• The analysis uses real hardware (FPAA) to measure actual reconfiguration delays, avoiding the optimistic assumptions of simulator-based studies.
• The paper advocates for failure modes and effects analysis (FMEA) to identify recovery deadlines and validate temporal correctness.

Experimental results

Research questions

• RQ1 Can intrinsic reconfiguration using evolvable hardware effectively recover from hardware faults in analog systems within a defined time window?
• RQ2 What is the impact of hardware programming and fitness evaluation times on the total reconfiguration time in intrinsic evolution?
• RQ3 How does the total reconfiguration time compare to system-specific fault recovery deadlines in real-time applications?
• RQ4 Is intrinsic reconfiguration viable for fault recovery if the total reconfiguration time exceeds the recovery deadline?
• RQ5 What role does failure modes and effects analysis (FMEA) play in establishing temporal correctness for EHW-based fault recovery?

Key findings

• The total reconfiguration time for evolving 500,000 compensator configurations on an FPAA was approximately 8.7 hours, due to 628.8 ms per configuration (3.8 ms programming + 625 ms fitness evaluation).
• Reconfiguration time can be prohibitively long for systems with recovery deadlines under 10 hours, such as those requiring communication sessions every 6 hours.
• Even with a modest population size and generation count, reconfiguration times can exceed fault recovery deadlines, making intrinsic reconfiguration impractical in time-critical systems.
• Temporal correctness is not guaranteed by logical correctness alone; a recovery method must be proven to complete before the system’s mandatory recovery deadline.
• Genetic programming algorithms are impractical for fault-tolerant systems due to long running times, especially when deployed on single processors without redundancy.
• The paper establishes that any EHW-based recovery method must be proven both logically and temporally correct, with temporal correctness verified through FMEA-driven deadline analysis.