[Paper Review] Power, Energy and Speed of Embedded and Server Multi-Cores applied to Distributed Simulation of Spiking Neural Networks: ARM in NVIDIA Tegra vs Intel Xeon quad-cores

Pier Stanislao Paolucci, Roberto Ammendola+8 more|arXiv (Cornell University)|May 12, 2015

Advanced Memory and Neural ComputingEngineering12 references17 citations

TL;DR

This study compares energy efficiency, power consumption, and execution speed of an embedded ARM-based system (NVIDIA Jetson TK1) versus a server Intel Xeon platform for distributed simulation of spiking neural networks using the DPSNN-STDP simulator. The ARM platform achieved 2.2 μJ per synaptic event—4.4× lower energy consumption than the Xeon server—despite being 3.3× slower, demonstrating superior energy efficiency for large-scale neural network simulations on low-power hardware.

ABSTRACT

This short note regards a comparison of instantaneous power, total energy consumption, execution time and energetic cost per synaptic event of a spiking neural network simulator (DPSNN-STDP) distributed on MPI processes when executed either on an embedded platform (based on a dual socket quad-core ARM platform) or a server platform (INTEL-based quad-core dual socket platform). We also compare the measure with those reported by leading custom and semi-custom designs: TrueNorth and SpiNNaker. In summary, we observed that: 1- we spent 2.2 micro-Joule per simulated event on the "embedded platform", approx. 4.4 times lower than what was spent by the "server platform"; 2- the instantaneous power consumption of the "embedded platform" was 14.4 times better than the "server" one; 3- the server platform is a factor 3.3 faster. The "embedded platform" is made of NVIDIA Jetson TK1 boards, interconnected by Ethernet, each mounting a Tegra K1 chip including a quad-core ARM Cortex-A15 at 2.3GHz. The "server platform" is based on dual-socket quad-core Intel Xeon CPUs (E5620 at 2.4GHz). The measures were obtained with the DPSNN-STDP simulator (Distributed Simulator of Polychronous Spiking Neural Network with synaptic Spike Timing Dependent Plasticity) developed by INFN, that already proved its efficient scalability and execution speed-up on hundreds of similar "server" cores and MPI processes, applied to neural nets composed of several billions of synapses.

Motivation & Objective

• To evaluate and compare the energy efficiency, power consumption, and execution speed of embedded ARM and server Intel Xeon multi-core systems in distributed spiking neural network simulations.
• To assess the energetic cost per synaptic event in large-scale neural network simulations on heterogeneous hardware platforms.
• To benchmark the performance of general-purpose multi-core systems against specialized neuromorphic architectures like TrueNorth and SpiNNaker in terms of energy and speed.
• To determine whether low-power embedded systems can outperform traditional server platforms in energy efficiency for distributed neural network simulation.

Proposed method

• The DPSNN-STDP simulator, designed for scalable distributed simulation of polychronous spiking neural networks with STDP plasticity, was deployed across MPI processes on both platforms.
• The embedded platform used dual NVIDIA Jetson TK1 boards, each with a Tegra K1 chip containing a quad-core ARM Cortex-A15 at 2.3 GHz, connected via Ethernet.
• The server platform used dual-socket Intel Xeon E5620 processors (quad-core each, 2.4 GHz), forming a high-performance compute cluster.
• Power and energy consumption were measured in real time during simulation runs, with total energy per synaptic event calculated as the ratio of total energy to number of simulated events.
• Performance metrics were compared against state-of-the-art neuromorphic systems (TrueNorth and SpiNNaker) to contextualize results.
• All measurements were conducted on identical neural network workloads with billions of synapses to ensure fair comparison.

Experimental results

Research questions

• RQ1 How does the energy consumption per synaptic event compare between an embedded ARM-based system and a traditional server Intel Xeon platform in distributed spiking neural network simulations?
• RQ2 What is the instantaneous power efficiency of the embedded ARM platform relative to the server Xeon platform in this computational workload?
• RQ3 To what extent does the performance gap between the two platforms affect the overall energy efficiency of the simulation?
• RQ4 Can general-purpose embedded multi-core systems achieve competitive energy efficiency compared to specialized neuromorphic hardware in large-scale neural network simulations?

Key findings

• The embedded ARM platform consumed 2.2 micro-Joules per simulated synaptic event, which was 4.4 times lower than the 9.68 micro-Joules consumed by the server Xeon platform.
• The embedded platform achieved 14.4 times better instantaneous power efficiency compared to the server platform, indicating significantly lower power draw during operation.
• Despite the energy advantage, the server platform was 3.3 times faster in execution time, highlighting the trade-off between speed and energy efficiency.
• The results demonstrate that embedded ARM systems can achieve substantially better energy efficiency than traditional server platforms for large-scale spiking neural network simulations.
• The performance of the embedded system, while slower, remains competitive in terms of energy cost per event, especially for applications where power constraints are critical.