Jae-Hyuk Choi
Sungkyunkwan University · 工学
研究室紹介
Professor Jae-Hyuk Choi's research lab specializes in low-power, adaptive imaging systems and smart sensor technologies for mobile, wearable, and wireless applications. The lab focuses on developing energy-efficient CMOS image sensors with dynamic operating modes, object-adaptive sensing, and illumination or motion-triggered operation to minimize power consumption. Key research directions include spatial-temporal multiresolution imaging, energy harvesting integration, and advanced signal processing for real-time object detection and tracking. The lab also explores nanomaterial-based flexible sensors, particularly silver nanowire-based strain sensors, for next-generation wearable and embedded sensing systems.
Research Overview
Research Output Trend
Figures are computed from collected data and may differ slightly.
Selected Papers
15We report a low-power object-adaptive CMOS imager, which suppresses spatial temporal bandwidth. The object-adaptive imager has embedded a feature extraction algorithm for identifying objects of interest. The sensor wakes up triggered by motion sensing and extracts features from the captured image for the detection of object-of-interest (OOI). Full-image capturing operation and image signal transmission are performed only when the interested objects are found, which significantly reduces power co
This paper presents a low-power always-on image sensor for mobile and wearable device applications. The sensor continuously captures images for smart sensing, such as face detection, eye tracking, and gesture recognition, and it provides high-resolution images for capturing pictures with a unified sensor. The sensor employs a switchable dual mode: always-on (AO) mode with low power consumption and photo-shooting (PS) mode with high signal-to-noise ratio. For dual-mode operation with high energy
We present an energy/illumination-adaptive CMOS image sensor for distributed wireless sensor applications. The adaptive feature enables always-on imaging operation with extremely low power consumption for extended lifetime of wireless image sensor nodes and provides optimum images in a wide range of illuminations. For adaptive operation, the sensor employs reconfigurable modes of operation. Most of time, the sensor is in a monitoring mode, which keeps imaging at extremely low power consumption.
In this paper, we report a CMOS image sensor for spatial-temporal multiresolution images. This image sensor simultaneously generates two outputs: one for normal images (<30 fps) of stationery background and the other for adaptable frame-rate images (over 960 fps) of moving objects. The moving objects are tracked with a reduced spatial resolution in the region-of-interest (ROI). The entire image is reconstructed from the two images with the details in stationery objects and the suppressed motion
For outdoor surveillance, sensitivity and dynamic range are important to deliver reliable images over widely changing illumination. However, constant monitoring with maximum awareness requires large power consumption and is not suitable for energy-limited applications such as battery-operated and/or energy-scavenging wireless sensor nodes. One of the ways to reduce power is voltage scaling [1-4]. However, it significantly reduces the SNR and results in poor image quality [4]. The signal can be e
Flexible and thin displays for smart devices have a large coupling capacitance between the sensor electrode of the touch screen panel (TSP) and the display electrode. This increased coupling capacitance limits the signal passband to less than 100 kHz, resulting in a significant reduction in the received signal, with a driving frequency of several hundred kilohertz used for noise avoidance. To overcome this problem, we reduced the effective capacitance at the analog front-end by connecting a circ
A CMOS image sensor simultaneously generates spatial-temporal multi-resolution images from two channels: one for normal images (<30fps) for stationary backgrounds; and the other for high-frame-rate images (adaptable to over 960fps) with reduced spatial resolution for moving objects in the region-of-interest. This sensor employs on-chip motion detection circuits, consumes 75mW at 3.3V and is fabricated in 0.35 μm CMOS
We present a CMOS image sensor with integrated background suppression scheme for detecting small signals out of unwanted background signals. For the background suppression, differential signals with suppressed common-mode background signals are sampled within a short sub-sensing time in order to avoid the saturation from strong background signals. Analog differential signals are digitally accumulated multiple times in one integration time for high SNR. The column-parallel background suppression
Distributed sensor nodes typically operate under the constraint of limited energy source, and power consumption is an important factor to extend the lifetime of sensor systems. Several low-power imagers have been reported for application to wireless sensor networks [1,2]. However, the biggest power consumption comes from wireless signal transmission due to the large bandwidth of image signals [3]. One way to reduce the bandwidth is to generate signals only when an event happens, by monitoring te
The decision to attempt or suspend transmission is cast as a stochastic control problem with imperfect state information. By employing a dynamic programming formulation, the tradeoff between high throughput and energy efficiency is resolved in a flexible cost structure over which the optimization is performed. The optimal policy is derived and shown to be a threshold rule that varies with the memory present in the error process. A suboptimal implementation of the policy indicates that the protoc
The booster plate in NAND flash memory cells gives numerous advantages: the reduction of program, erase and pass voltages, zero program disturbance and increased cell current. At the same time, it is simple to integrate the technology to the conventional fabrication processes. It is expected that the booster plate technology will become one of the key technologies for achieving high density memories such as 256 Mbit and 1 Gbit NAND flash.
A depth sensor with integrated frame difference detection is proposed. Instead of frame difference detection using light intensity, which is vulnerable to ambient light, the difference in depth between successive frames can be acquired. Because the conventional time-of-flight depth sensor requires two frames of depth-image acquisition with four-phase modulation, it has large power consumption, as well as a large area for external frame memories. Therefore, we propose a simple two-step comparison
Abstract : Turbine blades with controlled textures such as directionally solidified and single crystal structures have proven to have much improved ductility and longer thermal and fatigue life. It has been further reported that the benefits of single-crystal over conventionally cast as well as directionally solidified components critically depend on avoiding the introduction of defects, such as stray grains, freckles, or deviations from the required crystal orientation. Laser-based direct metal
Energy-efficient design approaches for always-on imaging will be reviewed. Circuit design techniques including dynamic voltage scaling (DVS), dynamic current scaling (DCS), and dynamic frequency scaling (DFS) will be described. In addition, energy-efficient architecture for image signal readout will be described. Finally, power reduction techniques by adaptively suppressing spatial and temporal bandwidth of image signals will be introduced. These energy-efficient design approaches will be illust