Jin Park
Sungkyunkwan University · 工学
研究室紹介
Professor Jin Park's research lab specializes in interdisciplinary engineering and financial systems, focusing on advanced semiconductor devices, secure medical imaging systems, and the financial economics of insurance industries. The lab conducts cutting-edge research in nanoscale memory technologies—particularly capacitorless 1T-DRAM with polycrystalline silicon nanotubes—while also developing secure, lightweight cryptographic solutions for resource-constrained medical PACS. Additionally, the lab applies econometric models to analyze financial efficiency, risk absorption, and liquidity creation in the US insurance sector, especially in property-liability and life insurance markets. These diverse yet interconnected research directions reflect a strong emphasis on both technological innovation and real-world financial system analysis.
Research Overview
Research Output Trend
Figures are computed from collected data and may differ slightly.
Selected Papers
15Purpose The purpose of this study is to investigate interest rate sensitivity of the US property/liability (P/L) insurers stock returns using various return generating process models incorporating different interest rate changes such as actual interest rate changes, unexpected interest rate changes and orthogonalized market returns. Design/methodology/approach The study follows the 1974 two‐index model by Stone. In the two‐index model, three different interest rate indices are tested one at a ti
The system as a PACS(picture archiving and communication system), which handles medical image, saves patient's medical image information and transports them. This needs security processor for user's authentication and encrypted information based on PKI(public key infrastructure). The DICOM (digital imaging communications in medicine), which is a standard of PACS's transmission, has adopted RSA(Rivest Shamir Adleman) in the authentication and transmission, which is public key algorithm. However,
In this study, a capacitorless one-transistor dynamic random-access memory (1T-DRAM) based on a polycrystalline silicon nanotube structure with a grain boundary (GB) is designed and analyzed using technology computer-aided design (TCAD) simulation. The proposed 1T-DRAM has the improved electrical performances because the outer gate (OG) and the inner gate (IG) effectively control the charges in the channel and body regions. IG has an asymmetric structure with an underlap (Lunderlap) region to re
Purpose The purpose of this paper is to investigate coexistence of multiple distribution systems in property‐casualty (P/C) insurance industry in the USA. Design/methodology/approach Stochastic frontier analysis is used to measure cost and revenue efficiencies of P/C insurance companies utilizing different distribution systems. Findings Independent agent insurers are found to be cost inefficient compared to insurers with other distribution systems, but the independent agent insurers have better
A novel design of a microwave communications link operating at 5.8 GHz is presented based on self-heterodyne direct downconversion (SHDDC) and system predistortion. Utilizing the SHDDC scheme eliminates the need of any local oscillators at the receive ends and minimizes spectrum usage; however, the transmitter power efficiency is low, and there exist high mixer intermodulation levels in the receiver. To overcome these drawbacks, a system predistortion approach is proposed. A two-tone measurement
Purpose – The purpose of this paper is twofold: first, this paper measures how much liquidity is transformed by the US life insurance industry for the sample period; and Second, this study tests the “risk absorption” hypothesis and “financial fragility-crowding out” hypothesis to identify the impact of capital on liquidity creation in the US life insurance industry. In addition, a regression model is conducted to explore the relationship between liquidity creation and other firm characteristics.
In an attempt to reduce the number of threading dislocations propagating through a silicon epitaxial layer grown on an implanted buried-oxide structure, a SiGe/Si superlattice was placed between the initial silicon surface layer and the subsequently grown silicon epitaxial layer. Both the superlattice and the silicon epitaxial layer were formed by molecular-beam epitaxy. Some of the threading dislocations are bent parallel to the superlattice as they propagate through the structure. Some of thes
In this study, a capacitorless one-transistor dynamic random-access memory (1T-DRAM) cell based on a polycrystalline silicon dual-gate metal-oxide-semiconductor field-effect transistor with a fin-shaped structure was optimized and analyzed using technology computer-aided design simulation. The proposed 1T-DRAM demonstrated improved memory characteristics owing to the adoption of the fin-shaped structure on the side of gate 2. This was because the holes generated during the program operation were
A novel design of a microwave communications link operating at 5.8 GHz is presented based on self-heterodyne direct downconversion (SHDDC) and system predistortion. With the SHDDC scheme, the need of any local oscillators at the receive ends is eliminated, and the spectrum usage is minimized; however, the transmitter power efficiency is low, and there exists high mixer intermodulation levels in the receiver. To overcome these drawbacks, a system predistortion approach is proposed. A two-tone mea
In this study, a capacitorless one-transistor dynamic random-access memory (1T-DRAM), based on polycrystalline silicon (poly-Si) nanotube structure with a grain boundary (GB), is designed and analyzed using technology computer-aided design (TCAD) simulation. In the proposed 1T-DRAM, the 1T-DRAM cell exhibited a sensing margin of 422 μA/μm and a retention time of 213 ms at T = 358 K with a single GB. To investigate the effect of random GBs, it was assumed that the number of GB is seven, and the m
In this study, a complementary field-effect transistor (CFET) based on a polycrystalline silicon (poly-Si) stacked-nanosheet (NS) structure with a grain boundary (GB) is designed and analyzed using a technology computer-aided design (TCAD) simulation. The advantage of the CFET using a poly-Si is that the active cell region can be reduced by 50 % because the p-type transistors are vertically stacked on the n-type transistors. In addition, it is possible to replace the conventional CMOS process an