Jong-Wook Jeon

Present work experimentally characterizes the optical property of blended plasmonic nanofuids based on gold nanorod (AuNR) with different aspect ratios. The existence of localized surface plasmon resonance was verified from measured extinction coefficient of three AuNR solutions, and spectral tunability of AuNR nanofluid was successfully demonstrated in the visible and near-infrared spectral region. The representative aspect ratio and volume fraction of each sample were then calculated from the

The gap between the architectural information and the as-is building condition has been known as one of the pivotal factors influencing deviations between actual and predicted building energy consumption. Despite such significance, quantifying the impact of deviated building information on energy use has not been fully investigated. This paper explores building information modelling (BIM)-driven experimental simulation to quantify the impact of building envelope condition on energy use, which ca

This study analyzes the single-event transient (SET) characteristics of alpha particles on multi-channel Forksheet-FET and Nanosheet-FET at the device and circuit levels through 3D TCAD simulations. The study investigates the differences in SET responses based on the energy and incident position of incoming alpha particles, considering the structural variances between Forksheet-FET and Nanosheet-FET, as well as the presence or absence of bottom dielectric isolation (BDI) in the fabrication proce

Abstract In this study, we applied ferroelectrics to the gate stack of Field Effect Transistors (FETs) with a 2D transition-metal dichalcogenide (TMDC) channel, actively researching for sub-2nm technology node implementation. Subsequently, we analyzed the circuit characteristics of Logic-in-Memory (LiM) operation and utilized LiM features after applying ferroelectrics to achieve a single-device configuration. Based on well-calibrated simulations, we performed compact modeling in a circuit simula

We report the employment of an electrohydrodynamic-jet (EHD)-printed diketopyrrolopyrrole-based copolymer (P-29-DPPDTSE) as the active layer of fabricated organic field-effect transistors (OFETs) and circuits. The device produced at optimal conditions showed a field-effect mobility value of 0.45 cm2/(Vs). The morphologies of the printed P-29-DPPDTSE samples were determined by performing optical microscopy, X-ray diffraction, and atomic force microscopy experiments. In addition, numerical circuit

In this work, a hybrid-phase transition field-effects-transistor (hyper-FET) integrated with phase-transition materials (PTM) and a multi-nanosheet FET (mNS-FET) at the 3 nm technology node were analyzed at the device and circuit level. Through this, a benchmark was performed for presenting device design guidelines and for using ultra-low-power applications. We present an optimization flow considering hyper-FET characteristics at the device and circuit level, and analyze hyper-FET performance ac

Abstract A poly (3,6‐bis(thiophen‐2‐yl)−2,5‐bis(2‐decyltetradecyl)−2,5‐dihydropyrrolo[3,4‐c]pyrrole‐1,4‐dione‐co‐(2,3‐bis(phenyl)acrylonitrile)) (PDPADPP) copolymer, composed of diketopyrrolopyrrole (DPP) and a cyano (nitrile) group with a vinylene spacer linking two benzene rings, is synthesized via a palladium‐catalyzed Suzuki coupling reaction. The electrical performance of PDPADPP in organic field‐effect transistors (OFETs) and circuits is investigated. The OFETs based on PDPADPP exhibit typ

Accurate compensation operation of low-temperature polycrystalline-silicon (LTPS) thin-film transistor (TFT) in pixel circuits is crucial to achieve steady and uniform luminance in organic light-emitting diode (OLED) display panels. However, the device characteristics fluctuate over time due to various traps in the LTPS thin film transistor and at the interface with the gate insulator, resulting in abnormal phenomena such as short-time image sticking and luminance fluctuation, which degrade disp

Due to the limitations of the currently widely used von Neumann architecture-based computing system, research on various devices and circuit systems suitable for logic-in-memory computing applications has been conducted. In this work, the silicon-based floating gate memory cell transistor structure, which has been attracting attention as a memory to replace the dynamic random access memory or NAND Flash technology, was newly recalled, and its applicability to logic-in-memory application was conf

This paper explores the design and optimization of multi-Nanosheet Field-Effect Transistors (mNS-FETs) employing a Transition Metal Dichalcogenide (TMDC) channel, specifically MoS 2 , for the 0.7 nm technology node using calibrated Technology Computer-Aided Design (TCAD) simulations. A comprehensive analysis is conducted at both the device and circuit levels, considering various structural parameters such as the number of MoS 2 layers, vertical and lateral nanosheet stacking configurations, and