Joungho Kim
Korea Advanced Institute of Science and Technology · 工学
研究室紹介
Professor Joungho Kim's research lab specializes in advanced electromagnetic modeling and simulation for high-frequency electronic systems, with a strong focus on power integrity, electromagnetic compatibility (EMC), and wireless power transfer. The lab develops scalable, physics-based models for critical components such as through-silicon vias (TSVs), power distribution networks, and magnetically coupled coils, enabling reliable design in 3D integrated circuits and electric vehicle charging systems. Key research directions include noise analysis in 3D ICs, optimization of wireless power transfer systems for efficiency and EMI suppression, and the development of innovative shielding and cancellation techniques. The lab combines analytical modeling with high-fidelity simulation tools to address real-world challenges in next-generation electronic packaging and power delivery systems.
Research Overview
Research Output Trend
Figures are computed from collected data and may differ slightly.
Selected Papers
15We propose a high-frequency scalable electrical model of a through silicon via (TSV). The proposed model includes not only the TSV, but also the bump and the redistribution layer (RDL), which are additional components when using TSVs for 3-D integrated circuit (IC) design. The proposed model is developed with analytic <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">RLGC</i> equations derived from the physical configuration. Each analytic equation is p
In this paper, we introduce the basic principles of wireless power transfer using magnetic field resonance and describe techniques for the design of a resonant magnetic coil, the formation of a magnetic field distribution, and electromagnetic field (EMF) noise suppression methods. The experimental results of wireless power transfer systems in consumer electronics applications are discussed in terms of issues related to their efficiency and EMF noise. Furthermore, we present a passive shielding m
The power consumption of microprocessors is increasing at an alarming rate leading to 2X reduction in the power distribution impedance for every product generation. In the last decade, high I/O ball grid array (BGA) packages have replaced quad flat pack (QFP) packages for lowering the inductance. Similarly, multilayered printed circuit boards loaded with decoupling capacitors are being used to meet the target impedance. With the trend toward system-on-package (SOP) architectures, the power distr
For wireless charging of electric vehicle (EV) batteries, high-frequency magnetic fields are generated from magnetically coupled coils. The large air-gap between two coils may cause high leakage of magnetic fields and it may also lower the power transfer efficiency (PTE). For the first time, in this paper, we propose a new set of coil design formulas for high-efficiency and low harmonic currents and a new design procedure for low leakage of magnetic fields for high-power wireless power transfer
The ever-increasing demands of digital computing and wireless communication have been driving the semiconductor technology to change with each passing day. Modern electronic systems integrate more complex components and devices, which results in a very complex electromagnetic (EM) field environment. EM compatibility has become one of the major issues in ICs redesign, mainly due to the lack of efficient and accurate simulation tools and expertise on noise reduction and immunity improvement. This
In three-dimensional integrated circuit (3D-IC) systems that use through-silicon via (TSV) technology, a significant design consideration is the coupling noise to or from a TSV. It is important to estimate the TSV noise transfer function and manage the noise-tolerance budget in the design of a reliable 3D-IC system. In this paper, a TSV noise coupling model is proposed based on a three-dimensional transmission line matrix method (3D-TLM). Using the proposed TSV noise coupling model, the noise tr
For high density and performance of microelectronic devices, the 3-D system in package (SiP) has been considered as a superb microelectronic packaging system. The development and evaluation of stacked chip type 3-D SiP with vertically interconnected TSV are reported. The process includes; 55μm-diameter via holes by reactive ion etching (RIE), SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> dielectric layer by thermal oxidation, Ta and Cu
Wireless power transfer (WPT) technology is a promising way for convenient and safe battery charging without any electrical contact, which may cause an unwanted electric spark or deliver dangerous electric current to the users. When transferring power from the source to the battery, strong electromagnetic fields (EMFs) are generated. Moreover, the inverter output contains a wide range of harmonics. Therefore, it is important to reduce the EMFs and electromagnetic interference (EMI) in a WPT syst
The impedance of a power-distribution network (PDN) in three-dimensionally stacked chips with multiple through-silicon-via (TSV) connections (a 3D TSV IC) was modeled and analyzed using a power/ground (P/G) TSV array model based on separated P/G TSV and chip-PDN models at frequencies up to 20 GHz. The proposed modeling and analysis methods for the P/G TSV and chip-PDN are fundamental for estimating the PDN impedances of 3D TSV ICs because they are composed of several chip-PDNs and several thousa
Several recent works have demonstrated the benefits of through-silicon-via (TSV) based 3D integration [1–4], but none of them involves a fully functioning multicore processor and memory stacking. 3D-MAPS (3D Massively Parallel Processor with Stacked Memory) is a two-tier 3D IC, where the logic die consists of 64 general-purpose processor cores running at 277MHz, and the memory die contains 256KB SRAM (see Fig. 10.6.1). Fabrication is done using 130nm GlobalFoundries device technology and Tezzaro
Current wireless power transfer (WPT) systems have limited charging distance and high induced electromagnetic field (EMF) leakage. Thus, we first proposed a thin printed circuit board (PCB) type hybrid metamaterial slab (HMS) combining two kinds of metamaterial cell structures. The metamaterial cells in the center area of the HMS have zero relative permeability and straighten the magnetic field direction. The metamaterial cells located at the edges of the HMS have negative relative permeability
In this paper, we introduce the On-line Electric Vehicle (OLEV) system and its non-contact power transfer mechanism and propose some techniques for the reduction of electromagnetic fields (EMFs) from the power line and the vehicle itself. By applying a metallic plate shield, horizontal/vertical shield, and connecting wire for loop cancellation, the low frequency EMFs have been significantly reduced. Simulation and measurement results for application to vehicles currently in service are also give
In this paper, we introduce the On-Line Electric Vehicle (OLEV) system and its non-contact power transfer mechanism. We propose the design methodology to maximize the wireless power transfer capability and power transfer efficiency and to minimize the electromagnetic field (EMF) from the wireless power transfer system in OLEV. By using the series resonant power transfer topology and vertical magnetic flux type of wireless power transfer system for transformer structure, the power transfer capabi
In this paper, we show the electrical characteristics of TSV (Through Silicon Via) depending on structural parameters such as TSV pitch, TSV height, TSV size and thickness of SiO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> for DC leakage blocking between TSV and silicon substrate, and material parameter of silicon substrate such as silicon resistivity in case of single silicon substrate. And we also show X-talk characteristics of two TSV
In this paper, we propose an equivalent circuit model of through wafer via which has height of 90 mum and diameter of 75 mum. The equivalent circuit model composed of RLCG components is developed based on the physical configuration of through wafer via. Then, the parameter values of the equivalent circuit model are fitted to the measured s-parameters up to 20GHz by parameter optimization method. The proposed model shows through wafer via is dominantly characterized by the capacitance of thin oxi