Suwan Kim
Kyung Hee University · 工学
研究室紹介
Professor Suwan Kim's research lab specializes in advanced semiconductor device technologies and integrated circuit design, with a primary focus on emerging transistor architectures such as Complementary FET (CFET) for next-generation nanoscale electronics. The lab investigates innovative cell synthesis methodologies, particularly optimizing transistor folding shapes and placement order in multi-row CFET-based standard cells to enhance area efficiency and routability. Their work bridges device physics, circuit design, and physical design automation to enable high-performance, scalable, and manufacturable integrated circuits. The lab also explores the impact of novel device structures on design-for-manufacturability and design-for-testability in advanced technology nodes.
Research Overview
Research Output Trend
Figures are computed from collected data and may differ slightly.
Selected Papers
1It has been widely accepted that Complementary-FET (CFET) is a promising technology, which stacks P-FET on N-FET or vice versa, to achieve this objective. In comparison with synthesizing the conventional FET based standard cells, two prominent optimization tasks in CFET based multi-row cell synthesis that significantly affect the cell quality, in terms of area and routability, are (1) <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">determining tr