Taedong Kim
Hanyang University · 工学
研究室紹介
Professor Taedong Kim's research lab specializes in advanced semiconductor technologies and integrated circuit design, with a focus on cutting-edge CMOS process development, including multi-gate finFET architectures and extreme ultraviolet (EUV)-compatible patterning techniques such as SAQP and SADP. The lab also explores embedded systems and smart power monitoring solutions, emphasizing energy efficiency, system-on-chip (SoC) integration, and real-time data management. Additionally, the lab engages in interdisciplinary research linking human behavior with technological environments, as seen in studies on spectator engagement in sports arenas, reflecting a broader interest in human-system interaction.
Research Overview
Research Output Trend
Figures are computed from collected data and may differ slightly.
Selected Papers
4We present a fully integrated 7nm CMOS platform featuring a 3 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">rd</sup> generation finFET architecture, SAQP for fin formation, and SADP for BEOL metallization. This technology reflects an improvement of 2.8X routed logic density and >40% performance over the 14nm reference technology described in [1-3]. A full range of Vts is enabled on-chip through a unique multi-workfunction process. This enables bot
This study was to investigate the relationship between consuming behaviors and the enticing factors of sports arena. The independent variables of the study was royalty. The dependent variables were enticing factors including performance, status of reputation, facilities, and marketing factors. The subjects of the study were 470 randomly selected spectators who were present at 3 games, held in Wonju, Seoul, and Anyang among pro-basketball season games. The apparatus to collect data was 'the enti
Whiting, W. C. FACSM; Johnson, J.; Kim, T.; Ogasawara, G.; Luong, K. Author Information
In this paper, a new OS-less power monitoring system with a remote download function is proposed. The proposed system consists of a SOC IC with TCP/IP protocol and an 8-bit processor with 128Kbyte flash memory, 32Kbyte SRAM, and 128Kbyte EEPROM. The system configuration and characteristics are explained in detail and the validity of the proposed system is verified by actual demonstration at the Telecommunication Center of Korea Telecom Company in Korea.