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Neural network technologies have taken center stage owing to their powerful computing capability for supporting deep learning in artificial intelligence. However, conventional synaptic devices such as SRAM and DRAM are not satisfactory solutions for neural networks. Recently, several types of memristor devices have become popular alternatives because of their outstanding characteristics such as scalability, high performance, and non-volatility. To understand the characteristics of memristors, a

A 256-Mb phase-change random access memory has been developed, featuring 66-MHz synchronous burst-read operation. Using a charge pump system, write performance was characterized at a low supply voltage of 1.8 V. Measured initial read access time and burst-read access time are 62 and 10 ns, respectively. The write throughput was 0.5 MB/s with internal times2 write and can be increased to ~2.67 MB/s with times16 write. Endurance and retention characteristics are measured to be 10 <sup xmlns:mml="h

We observed the atomic structures for each reset and set state in a phase-change random access memory fabricated using stoichiometric crystalline Ge2Sb2Te5. The reset state clearly showed a mixture of dome-shaped amorphous and crystal structure surrounding amorphous, but the set state showed abnormally grown large grains due to recrystallization of the amorphous structure. The crystal structure of the recrystallized grain was face-centered cubic. The element analysis indicated that the atomic co

This paper firstly reports key factors which are to be necessarily considered for the successful two-bit (four-level) cell operation in a phase-change random access memory (PRAM). They are 1) the write-and-verify (WAV) writing of four-level resistance states and 2) the moderate-quenched (MQ) writing of intermediate resistance levels, 3) the optimization of temporal resistance increase (so-called resistance drift) and 4) of resistance increase after thermal annealing. With taking into account of

By developing a chalcogenide memory element that can be operated at low writing current, we have demonstrated the possibility of high-density phase-change random access memory. We have investigated the phase transition behaviors as a function of various process factors including contact size, cell size and thickness, doping concentration in chalcogenide material and cell structure. As a result, we have observed that the writing current is reduced down to 0.7 mA.

The write performance of the 1.8-V 64-Mb phase-change random access memory (PRAM) has been improved, which was developed based on 0.12-/spl mu/m CMOS technology. For the improvement of RESET and SET distributions, a cell current regulator scheme and multiple step-down pulse generator were employed, respectively. The read access time and SET write time are 68 ns and 180 ns, respectively.

Single-crystal Bi2Te3 nanowires (NWs) and nanoribbons (NRs) were synthesized by a vapor-liquid-solid (VLS) method from Bi2Te3 powder. To investigate the thermal properties of the Bi2Te3 nanostructure, a nondestructive technique based on temperature dependent Raman mapping was carried out. The Raman peaks were red shifted with increasing temperature. In addition, the fraction of the laser power absorbed inside the Bi2Te3 nanostructures was estimated by optical simulation and used to calculate the

Neural networks trained by backpropagation have achieved tremendous successes on numerous intelligent tasks. However, naïve gradient-based training and updating methods on memristors impede applications due to intrinsic material properties. Here, we built a 39 nm 1 Gb phase change memory (PCM) memristor array and quantified the unique resistance drift effect. On this basis, spontaneous sparse learning (SSL) scheme that leverages the resistance drift to improve PCM-based memristor network trainin

Phase-change random access memory is considered a potential challenger for conventional memories, such as dynamic random access memory and flash memory due to its numerous advantages. Nevertheless, high reset current is the ultimate problem in developing high-density phase-change random access memory (PRAM). We focus on the adoption of Ge 2 Sb 2 Te 5 confined structures to achieve lower reset currents. By changing from a normal to a GST confined structure, the reset current drops to as low as 0.

A nonvolatile 16-kb one-transistor one-magnetic-tunnel-junction (1T1MTJ) magnetoresistance random access memory with 0.24-μm design rules was developed by using a self-reference sensing scheme for reliable sensing margin. This self-reference sensing scheme was achieved by first storing a voltage of the magnetic tunnel junction (MTJ), and then after a time interval storing a reference voltage of the same MTJ (self-reference). The effects of variation in tunneling oxide thickness can be eliminated

Abstract 2D materials have attracted attention in the field of neuromorphic computing applications, demonstrating the potential for their use in low‐power synaptic devices at the atomic scale. However, synthetic 2D materials contain randomly distributed intrinsic defects and exhibit a stochasitc forming process, which results in variability of switching voltages, times, and stat resistances, as well as poor synaptic plasticity. Here, this work reports the wafer‐scale synthesis of highly polycrys

An advanced bottom electrode contact (BEC) was successfully developed for reliable high-density 256Mb phase-change random access memory (PRAM) using a ring-type contact scheme. This advanced ring-type BEC was prepared by depositing very thin TiN films inside a contact hole, after which core dielectrics were uniformly filled into the TiN-deposited contact hole. Using this novel contact scheme, it was possible to reduce reset current while maintaining a low set resistance and a uniform cell distri

A multilevel cell (MLC) memristor that provides high-density on-chip memory has become a promising solution for energy-efficient artificial neural networks (ANNs). However, MLC storage that stores multiple bits per cell is prone to device variation. In this paper, the device variation tolerance of ANN training is investigated based on our cell-specific variation modeling method, which focuses on characterizing realistic cell-level variation. The parameters of cycle-to-cycle variation (CCV) and d

The spike-timing dependent plasticity (STDP) of biological synapses, which is known to be a function of the formulated Hebbian learning rule of human cognition, learning and memory abilities, was emulated with two-phase change memory (2-PCM) cells built with 39 nm technology. For this, we designed a novel time-modulated voltage (TMV) scheme for changing the conductance of 2-PCM cells, that could produce both long-term potentiation (LTP) and long-term depression (LTD) by applying variable (decrea

We have fully integrated a 64 Kb MRAM with 0.24 /spl mu/m-CMOS technology. A new sensing scheme employing a separated half-current source is adopted for the reference bit line to increase the sensing signal. To reduce cell resistance, a Co salicidation process is applied to transistor formation. In key fabrication processes, the roughness of the buffer layer, on which the MTJs are stacked, is reduced by using Ru on the TiN bottom electrode, and magnetic disturbance is avoided by depositing TiN h